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radeonsi: don't set sampler buffer offsets in create_sampler_view

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do it at bind time, so that pipe_sampler_view is immutable with regard to
buffer reallocations and we don't have to remember all existing buffer
views.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
This commit is contained in:
Marek Olšák
2016-10-02 16:05:51 +02:00
parent 7e6428e0a8
commit 7ce19d9014
3 changed files with 22 additions and 24 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/gallium/drivers/radeonsi/si_descriptors.c
+20 -13
View File
@@ -349,6 +349,17 @@ static void si_sampler_views_begin_new_cs(struct si_context *sctx,
}
}
/* Set buffer descriptor fields that can be changed by reallocations. */
static void si_set_buf_desc_address(struct r600_resource *buf,
uint64_t offset, uint32_t *state)
{
uint64_t va = buf->gpu_address + offset;
state[0] = va;
state[1] &= C_008F04_BASE_ADDRESS_HI;
state[1] |= S_008F04_BASE_ADDRESS_HI(va >> 32);
}
/* Set texture descriptor fields that can be changed by reallocations.
*
* \param tex texture
@@ -416,6 +427,10 @@ static void si_set_sampler_view(struct si_context *sctx,
if (rtex->resource.b.b.target == PIPE_BUFFER) {
rtex->resource.bind_history |= PIPE_BIND_SAMPLER_VIEW;
si_set_buf_desc_address(&rtex->resource,
view->u.buf.offset,
desc + 4);
} else {
bool is_separate_stencil =
rtex->db_compatible &&
@@ -621,6 +636,7 @@ static void si_set_shader_image(struct si_context *ctx,
struct si_images_info *images = &ctx->images[shader];
struct si_descriptors *descs = si_image_descriptors(ctx, shader);
struct r600_resource *res;
uint32_t *desc = descs->list + slot * 8;
if (!view || !view->resource) {
si_disable_shader_image(ctx, shader, slot);
@@ -641,6 +657,8 @@ static void si_set_shader_image(struct si_context *ctx,
view->u.buf.offset,
view->u.buf.size,
descs->list + slot * 8);
si_set_buf_desc_address(res, view->u.buf.offset, desc + 4);
images->compressed_colortex_mask &= ~(1 << slot);
res->bind_history |= PIPE_BIND_SHADER_IMAGE;
} else {
@@ -648,7 +666,6 @@ static void si_set_shader_image(struct si_context *ctx,
struct r600_texture *tex = (struct r600_texture *)res;
unsigned level = view->u.tex.level;
unsigned width, height, depth;
uint32_t *desc = descs->list + slot * 8;
bool uses_dcc = tex->dcc_offset &&
tex->surface.level[level].dcc_enabled;
@@ -1407,11 +1424,8 @@ static void si_desc_reset_buffer_offset(struct pipe_context *ctx,
uint64_t offset_within_buffer = old_desc_va - old_buf_va;
/* Update the descriptor. */
uint64_t va = r600_resource(new_buf)->gpu_address + offset_within_buffer;
desc[0] = va;
desc[1] = (desc[1] & C_008F04_BASE_ADDRESS_HI) |
S_008F04_BASE_ADDRESS_HI(va >> 32);
si_set_buf_desc_address(r600_resource(new_buf), offset_within_buffer,
desc);
}
/* INTERNAL CONST BUFFERS */
@@ -1491,7 +1505,6 @@ static void si_invalidate_buffer(struct pipe_context *ctx, struct pipe_resource
uint64_t old_va = rbuffer->gpu_address;
unsigned num_elems = sctx->vertex_elements ?
sctx->vertex_elements->count : 0;
struct si_sampler_view *view;
/* Reallocate the buffer in the same pipe_resource. */
r600_alloc_resource(&sctx->screen->b, rbuffer);
@@ -1564,12 +1577,6 @@ static void si_invalidate_buffer(struct pipe_context *ctx, struct pipe_resource
}
if (rbuffer->bind_history & PIPE_BIND_SAMPLER_VIEW) {
/* Texture buffers - update virtual addresses in sampler view descriptors. */
LIST_FOR_EACH_ENTRY(view, &sctx->b.texture_buffers, list) {
if (view->base.texture == buf) {
si_desc_reset_buffer_offset(ctx, &view->state[4], old_va, buf);
}
}
/* Texture buffers - update bindings. */
for (shader = 0; shader < SI_NUM_SHADERS; shader++) {
struct si_sampler_views *views = &sctx->samplers[shader].views;
src/gallium/drivers/radeonsi/si_pipe.h
-1
View File
@@ -125,7 +125,6 @@ struct si_blend_color {
struct si_sampler_view {
struct pipe_sampler_view base;
struct list_head list;
/* [0..7] = image descriptor
* [4..7] = buffer descriptor */
uint32_t state[8];
src/gallium/drivers/radeonsi/si_state.c
+2 -10
View File
@@ -2661,7 +2661,6 @@ si_make_buffer_descriptor(struct si_screen *screen, struct r600_resource *buf,
{
const struct util_format_description *desc;
int first_non_void;
uint64_t va;
unsigned stride;
unsigned num_records;
unsigned num_format, data_format;
@@ -2669,7 +2668,6 @@ si_make_buffer_descriptor(struct si_screen *screen, struct r600_resource *buf,
desc = util_format_description(format);
first_non_void = util_format_get_first_non_void_channel(format);
stride = desc->block.bits / 8;
va = buf->gpu_address + offset;
num_format = si_translate_buffer_numformat(&screen->b.b, desc, first_non_void);
data_format = si_translate_buffer_dataformat(&screen->b.b, desc, first_non_void);
@@ -2679,9 +2677,8 @@ si_make_buffer_descriptor(struct si_screen *screen, struct r600_resource *buf,
if (screen->b.chip_class >= VI)
num_records *= stride;
state[4] = va;
state[5] = S_008F04_BASE_ADDRESS_HI(va >> 32) |
S_008F04_STRIDE(stride);
state[4] = 0;
state[5] = S_008F04_STRIDE(stride);
state[6] = num_records;
state[7] = S_008F0C_DST_SEL_X(si_map_swizzle(desc->swizzle[0])) |
S_008F0C_DST_SEL_Y(si_map_swizzle(desc->swizzle[1])) |
@@ -2967,8 +2964,6 @@ si_create_sampler_view_custom(struct pipe_context *ctx,
state->u.buf.offset,
state->u.buf.size,
view->state);
LIST_ADDTAIL(&view->list, &sctx->b.texture_buffers);
return &view->base;
}
@@ -3081,9 +3076,6 @@ static void si_sampler_view_destroy(struct pipe_context *ctx,
{
struct si_sampler_view *view = (struct si_sampler_view *)state;
if (state->texture && state->texture->target == PIPE_BUFFER)
LIST_DELINIT(&view->list);
pipe_resource_reference(&state->texture, NULL);
FREE(view);
}