v3d: emit correct lowering for logic ops with integer render targets
Reviewed-by: Eric Anholt <eric@anholt.net>
This commit is contained in:
@@ -1686,8 +1686,11 @@ vir_emit_tlb_color_read(struct v3d_compile *c, nir_intrinsic_instr *instr)
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if (swap_rb)
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num_components = MAX2(num_components, 3);
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bool is_int_format = (c->fs_key->int_color_rb & (1 << rt)) ||
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(c->fs_key->uint_color_rb & (1 << rt));
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nir_variable *var = c->output_color_var[rt];
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enum glsl_base_type type = glsl_get_base_type(var->type);
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bool is_int_format = type == GLSL_TYPE_INT ||
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type == GLSL_TYPE_UINT;
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bool is_32b_tlb_format = is_int_format ||
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(c->fs_key->f32_color_rb & (1 << rt));
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@@ -164,17 +164,32 @@ v3d_nir_get_tlb_color(nir_builder *b, int rt, int sample)
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}
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static nir_ssa_def *
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v3d_nir_emit_logic_op(struct v3d_compile *c, nir_builder *b,
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nir_ssa_def *src, int rt, int sample)
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v3d_emit_logic_op_raw(struct v3d_compile *c, nir_builder *b,
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nir_ssa_def **src_chans, nir_ssa_def **dst_chans,
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int rt, int sample)
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{
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nir_ssa_def *dst = v3d_nir_get_tlb_color(b, rt, sample);
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const uint8_t *fmt_swz = v3d_get_format_swizzle_for_rt(c, rt);
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nir_ssa_def *src_chans[4], *dst_chans[4];
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for (unsigned i = 0; i < 4; i++) {
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src_chans[i] = nir_channel(b, src, i);
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dst_chans[i] = nir_channel(b, dst, i);
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nir_ssa_def *op_res[4];
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for (int i = 0; i < 4; i++) {
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nir_ssa_def *src = src_chans[i];
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nir_ssa_def *dst =
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v3d_nir_get_swizzled_channel(b, dst_chans, fmt_swz[i]);
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op_res[i] = v3d_logicop(b, c->fs_key->logicop_func, src, dst);
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}
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nir_ssa_def *r[4];
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for (int i = 0; i < 4; i++)
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r[i] = v3d_nir_get_swizzled_channel(b, op_res, fmt_swz[i]);
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return nir_vec4(b, r[0], r[1], r[2], r[3]);
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}
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static nir_ssa_def *
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v3d_emit_logic_op_unorm(struct v3d_compile *c, nir_builder *b,
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nir_ssa_def **src_chans, nir_ssa_def **dst_chans,
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int rt, int sample)
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{
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const uint8_t src_swz[4] = { 0, 1, 2, 3 };
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nir_ssa_def *packed_src =
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v3d_nir_swizzle_and_pack(b, src_chans, src_swz);
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@@ -189,6 +204,26 @@ v3d_nir_emit_logic_op(struct v3d_compile *c, nir_builder *b,
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return v3d_nir_unpack_and_swizzle(b, packed_result, fmt_swz);
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}
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static nir_ssa_def *
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v3d_nir_emit_logic_op(struct v3d_compile *c, nir_builder *b,
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nir_ssa_def *src, int rt, int sample)
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{
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nir_ssa_def *dst = v3d_nir_get_tlb_color(b, rt, sample);
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nir_ssa_def *src_chans[4], *dst_chans[4];
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for (unsigned i = 0; i < 4; i++) {
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src_chans[i] = nir_channel(b, src, i);
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dst_chans[i] = nir_channel(b, dst, i);
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}
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if (util_format_is_unorm(c->fs_key->color_fmt[rt].format)) {
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return v3d_emit_logic_op_unorm(c, b, src_chans, dst_chans,
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rt, 0);
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} else {
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return v3d_emit_logic_op_raw(c, b, src_chans, dst_chans, rt, 0);
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}
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}
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static void
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v3d_nir_lower_logic_op_instr(struct v3d_compile *c,
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nir_builder *b,
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