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i965: Move Gen4-5 programs to brw_upload_programs() too.

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This way all the programs are in one place again, and it also should
make some future STATE_BASE_ADDRESS related changes possible.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
This commit is contained in:
Kenneth Graunke
2016-04-27 11:25:26 -07:00
parent b23b099a0b
commit 7b70a12e1c
5 changed files with 51 additions and 56 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/mesa/drivers/dri/i965/brw_clip.c
+12 -16
View File
@@ -132,12 +132,23 @@ static void compile_clip_prog( struct brw_context *brw,
/* Calculate interpolants for triangle and line rasterization.
*/
static void
void
brw_upload_clip_prog(struct brw_context *brw)
{
struct gl_context *ctx = &brw->ctx;
struct brw_clip_prog_key key;
if (!brw_state_dirty(brw,
_NEW_BUFFERS |
_NEW_LIGHT |
_NEW_POLYGON |
_NEW_TRANSFORM,
BRW_NEW_BLORP |
BRW_NEW_INTERPOLATION_MAP |
BRW_NEW_REDUCED_PRIMITIVE |
BRW_NEW_VUE_MAP_GEOM_OUT))
return;
memset(&key, 0, sizeof(key));
/* Populate the key:
@@ -252,18 +263,3 @@ brw_upload_clip_prog(struct brw_context *brw)
compile_clip_prog( brw, &key );
}
}
const struct brw_tracked_state brw_clip_prog = {
.dirty = {
.mesa = _NEW_BUFFERS |
_NEW_LIGHT |
_NEW_POLYGON |
_NEW_TRANSFORM,
.brw = BRW_NEW_BLORP |
BRW_NEW_INTERPOLATION_MAP |
BRW_NEW_REDUCED_PRIMITIVE |
BRW_NEW_VUE_MAP_GEOM_OUT,
},
.emit = brw_upload_clip_prog
};
src/mesa/drivers/dri/i965/brw_interpolation_map.c
+8 -12
View File
@@ -36,12 +36,19 @@ static char const *get_qual_name(int mode)
/* Set up interpolation modes for every element in the VUE */
static void
void
brw_setup_vue_interpolation(struct brw_context *brw)
{
const struct gl_fragment_program *fprog = brw->fragment_program;
struct brw_vue_map *vue_map = &brw->vue_map_geom_out;
if (!brw_state_dirty(brw,
_NEW_LIGHT,
BRW_NEW_BLORP |
BRW_NEW_FRAGMENT_PROGRAM |
BRW_NEW_VUE_MAP_GEOM_OUT))
return;
memset(&brw->interpolation_mode, INTERP_QUALIFIER_NONE, sizeof(brw->interpolation_mode));
brw->ctx.NewDriverState |= BRW_NEW_INTERPOLATION_MAP;
@@ -100,14 +107,3 @@ brw_setup_vue_interpolation(struct brw_context *brw)
}
}
}
const struct brw_tracked_state brw_interpolation_map = {
.dirty = {
.mesa = _NEW_LIGHT,
.brw = BRW_NEW_BLORP |
BRW_NEW_FRAGMENT_PROGRAM |
BRW_NEW_VUE_MAP_GEOM_OUT,
},
.emit = brw_setup_vue_interpolation
};
src/mesa/drivers/dri/i965/brw_sf.c
+16 -20
View File
@@ -133,11 +133,26 @@ static void compile_sf_prog( struct brw_context *brw,
/* Calculate interpolants for triangle and line rasterization.
*/
static void
void
brw_upload_sf_prog(struct brw_context *brw)
{
struct gl_context *ctx = &brw->ctx;
struct brw_sf_prog_key key;
if (!brw_state_dirty(brw,
_NEW_BUFFERS |
_NEW_HINT |
_NEW_LIGHT |
_NEW_POINT |
_NEW_POLYGON |
_NEW_PROGRAM |
_NEW_TRANSFORM,
BRW_NEW_BLORP |
BRW_NEW_INTERPOLATION_MAP |
BRW_NEW_REDUCED_PRIMITIVE |
BRW_NEW_VUE_MAP_GEOM_OUT))
return;
/* _NEW_BUFFERS */
bool render_to_fbo = _mesa_is_user_fbo(ctx->DrawBuffer);
@@ -213,22 +228,3 @@ brw_upload_sf_prog(struct brw_context *brw)
compile_sf_prog( brw, &key );
}
}
const struct brw_tracked_state brw_sf_prog = {
.dirty = {
.mesa = _NEW_BUFFERS |
_NEW_HINT |
_NEW_LIGHT |
_NEW_POINT |
_NEW_POLYGON |
_NEW_PROGRAM |
_NEW_TRANSFORM,
.brw = BRW_NEW_BLORP |
BRW_NEW_INTERPOLATION_MAP |
BRW_NEW_REDUCED_PRIMITIVE |
BRW_NEW_VUE_MAP_GEOM_OUT,
},
.emit = brw_upload_sf_prog
};
src/mesa/drivers/dri/i965/brw_state.h
+9 -3
View File
@@ -45,7 +45,6 @@ enum intel_msaa_layout;
extern const struct brw_tracked_state brw_blend_constant_color;
extern const struct brw_tracked_state brw_cc_vp;
extern const struct brw_tracked_state brw_cc_unit;
extern const struct brw_tracked_state brw_clip_prog;
extern const struct brw_tracked_state brw_clip_unit;
extern const struct brw_tracked_state brw_vs_pull_constants;
extern const struct brw_tracked_state brw_tcs_pull_constants;
@@ -65,7 +64,6 @@ extern const struct brw_tracked_state brw_depthbuffer;
extern const struct brw_tracked_state brw_polygon_stipple_offset;
extern const struct brw_tracked_state brw_polygon_stipple;
extern const struct brw_tracked_state brw_recalculate_urb_fence;
extern const struct brw_tracked_state brw_sf_prog;
extern const struct brw_tracked_state brw_sf_unit;
extern const struct brw_tracked_state brw_sf_vp;
extern const struct brw_tracked_state brw_state_base_address;
@@ -102,7 +100,6 @@ extern const struct brw_tracked_state brw_cs_ubo_surfaces;
extern const struct brw_tracked_state brw_cs_abo_surfaces;
extern const struct brw_tracked_state brw_cs_image_surfaces;
extern const struct brw_tracked_state brw_wm_unit;
extern const struct brw_tracked_state brw_interpolation_map;
extern const struct brw_tracked_state brw_psp_urb_cbs;
@@ -415,6 +412,15 @@ void gen7_enable_hw_binding_tables(struct brw_context *brw);
void gen7_disable_hw_binding_tables(struct brw_context *brw);
void gen7_reset_hw_bt_pool_offsets(struct brw_context *brw);
/* brw_interpolation_map.c */
void brw_setup_vue_interpolation(struct brw_context *brw);
/* brw_clip.c */
void brw_upload_clip_prog(struct brw_context *brw);
/* brw_sf.c */
void brw_upload_sf_prog(struct brw_context *brw);
/* gen7_l3_state.c */
void
gen7_restore_default_l3_config(struct brw_context *brw);
src/mesa/drivers/dri/i965/brw_state_upload.c
+6 -5
View File
@@ -45,11 +45,6 @@
static const struct brw_tracked_state *gen4_atoms[] =
{
&brw_interpolation_map,
&brw_clip_prog, /* must do before state base address */
&brw_sf_prog, /* must do before state base address */
/* Once all the programs are done, we know how large urb entry
* sizes need to be and can decide if we need to change the urb
* layout.
@@ -749,6 +744,12 @@ brw_upload_programs(struct brw_context *brw,
old_separate != brw->vue_map_geom_out.separate)
brw->ctx.NewDriverState |= BRW_NEW_VUE_MAP_GEOM_OUT;
if (brw->gen < 6) {
brw_setup_vue_interpolation(brw);
brw_upload_clip_prog(brw);
brw_upload_sf_prog(brw);
}
brw_upload_wm_prog(brw);
} else if (pipeline == BRW_COMPUTE_PIPELINE) {
brw_upload_cs_prog(brw);