AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

radv: only emit the TBA/TMA registers on GFX8

Browse Source 
On GFX9+, these registers are privilegied and the kernel needs to
configure them.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31925>
This commit is contained in:
Samuel Pitoiset
2024-10-31 16:04:49 +01:00
committed by Marge Bot
parent 930395c5e4
commit 7b4da7f736
1 changed files with 2 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/amd/vulkan/radv_queue.c
+2 -6
View File
@@ -700,11 +700,9 @@ radv_emit_compute(struct radv_device *device, struct radeon_cmdbuf *cs, bool is_
ac_pm4_set_reg(pm4, R_00B814_COMPUTE_START_Y, 0);
ac_pm4_set_reg(pm4, R_00B818_COMPUTE_START_Z, 0);
if (device->tma_bo) {
if (pdev->info.gfx_level == GFX8 && device->tma_bo) {
uint64_t tba_va, tma_va;
assert(pdev->info.gfx_level == GFX8);
tba_va = radv_shader_get_va(device->trap_handler_shader);
tma_va = radv_buffer_get_va(device->tma_bo);
@@ -866,11 +864,9 @@ radv_emit_graphics(struct radv_device *device, struct radeon_cmdbuf *cs)
S_028818_VPORT_Z_SCALE_ENA(1) | S_028818_VPORT_Z_OFFSET_ENA(1));
}
if (device->tma_bo) {
if (pdev->info.gfx_level == GFX8 && device->tma_bo) {
uint64_t tba_va, tma_va;
assert(pdev->info.gfx_level == GFX8);
tba_va = radv_shader_get_va(device->trap_handler_shader);
tma_va = radv_buffer_get_va(device->tma_bo);