i965/fs: Use SIMD8 SSBO GET_BUFFER_SIZE message regardless of the dispatch width.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
This commit is contained in:
@@ -3845,34 +3845,30 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr
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case nir_intrinsic_get_buffer_size: {
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nir_const_value *const_uniform_block = nir_src_as_const_value(instr->src[0]);
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unsigned ssbo_index = const_uniform_block ? const_uniform_block->u32[0] : 0;
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int reg_width = dispatch_width / 8;
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/* A resinfo's sampler message is used to get the buffer size. The
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* SIMD8's writeback message consists of four registers and SIMD16's
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* writeback message consists of 8 destination registers (two per each
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* component). Because we are only interested on the first channel of
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* the first returned component, where resinfo returns the buffer size
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* for SURFTYPE_BUFFER, we can just use the SIMD8 variant regardless of
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* the dispatch width.
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*/
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const fs_builder ubld = bld.exec_all().group(8, 0);
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fs_reg src_payload = ubld.vgrf(BRW_REGISTER_TYPE_UD);
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fs_reg ret_payload = ubld.vgrf(BRW_REGISTER_TYPE_UD, 4);
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/* Set LOD = 0 */
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fs_reg source = brw_imm_d(0);
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ubld.MOV(src_payload, brw_imm_d(0));
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int mlen = 1 * reg_width;
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/* A resinfo's sampler message is used to get the buffer size.
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* The SIMD8's writeback message consists of four registers and
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* SIMD16's writeback message consists of 8 destination registers
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* (two per each component), although we are only interested on the
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* first component, where resinfo returns the buffer size for
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* SURFTYPE_BUFFER.
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*/
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int regs_written = 4 * mlen;
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fs_reg src_payload = fs_reg(VGRF, alloc.allocate(mlen),
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BRW_REGISTER_TYPE_UD);
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bld.LOAD_PAYLOAD(src_payload, &source, 1, 0);
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fs_reg buffer_size = fs_reg(VGRF, alloc.allocate(regs_written),
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BRW_REGISTER_TYPE_UD);
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const unsigned index = prog_data->binding_table.ssbo_start + ssbo_index;
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fs_inst *inst = bld.emit(FS_OPCODE_GET_BUFFER_SIZE, buffer_size,
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src_payload, brw_imm_ud(index));
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fs_inst *inst = ubld.emit(FS_OPCODE_GET_BUFFER_SIZE, ret_payload,
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src_payload, brw_imm_ud(index));
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inst->header_size = 0;
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inst->mlen = mlen;
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inst->regs_written = regs_written;
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bld.MOV(retype(dest, buffer_size.type), buffer_size);
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inst->mlen = 1;
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inst->regs_written = 4;
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bld.MOV(retype(dest, ret_payload.type), component(ret_payload, 0));
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brw_mark_surface_used(prog_data, index);
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break;
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}
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