etnaviv: GC7000: Move etna_coalesce to emit header file
Want to be able to emit state from the texture implementation, and the blitter implementation. Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
This commit is contained in:
committed by
Christian Gmeiner
parent
571d980695
commit
77768b1859
@@ -44,12 +44,6 @@
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#include "hw/state_blt.xml.h"
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#include "util/u_math.h"
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struct etna_coalesce {
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uint32_t start;
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uint32_t last_reg;
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uint32_t last_fixp;
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};
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/* Queue a STALL command (queues 2 words) */
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static inline void
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CMD_STALL(struct etna_cmd_stream *stream, uint32_t from, uint32_t to)
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@@ -88,83 +82,6 @@ etna_stall(struct etna_cmd_stream *stream, uint32_t from, uint32_t to)
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}
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}
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static void
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etna_coalesce_start(struct etna_cmd_stream *stream,
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struct etna_coalesce *coalesce)
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{
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coalesce->start = etna_cmd_stream_offset(stream);
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coalesce->last_reg = 0;
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coalesce->last_fixp = 0;
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}
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static void
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etna_coalesce_end(struct etna_cmd_stream *stream,
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struct etna_coalesce *coalesce)
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{
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uint32_t end = etna_cmd_stream_offset(stream);
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uint32_t size = end - coalesce->start;
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if (size) {
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uint32_t offset = coalesce->start - 1;
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uint32_t value = etna_cmd_stream_get(stream, offset);
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value |= VIV_FE_LOAD_STATE_HEADER_COUNT(size);
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etna_cmd_stream_set(stream, offset, value);
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}
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/* append needed padding */
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if (end % 2 == 1)
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etna_cmd_stream_emit(stream, 0xdeadbeef);
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}
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static void
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check_coalsence(struct etna_cmd_stream *stream, struct etna_coalesce *coalesce,
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uint32_t reg, uint32_t fixp)
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{
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if (coalesce->last_reg != 0) {
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if (((coalesce->last_reg + 4) != reg) || (coalesce->last_fixp != fixp)) {
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etna_coalesce_end(stream, coalesce);
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etna_emit_load_state(stream, reg >> 2, 0, fixp);
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coalesce->start = etna_cmd_stream_offset(stream);
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}
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} else {
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etna_emit_load_state(stream, reg >> 2, 0, fixp);
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coalesce->start = etna_cmd_stream_offset(stream);
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}
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coalesce->last_reg = reg;
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coalesce->last_fixp = fixp;
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}
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static inline void
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etna_coalsence_emit(struct etna_cmd_stream *stream,
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struct etna_coalesce *coalesce, uint32_t reg,
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uint32_t value)
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{
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check_coalsence(stream, coalesce, reg, 0);
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etna_cmd_stream_emit(stream, value);
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}
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static inline void
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etna_coalsence_emit_fixp(struct etna_cmd_stream *stream,
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struct etna_coalesce *coalesce, uint32_t reg,
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uint32_t value)
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{
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check_coalsence(stream, coalesce, reg, 1);
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etna_cmd_stream_emit(stream, value);
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}
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static inline void
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etna_coalsence_emit_reloc(struct etna_cmd_stream *stream,
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struct etna_coalesce *coalesce, uint32_t reg,
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const struct etna_reloc *r)
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{
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if (r->bo) {
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check_coalsence(stream, coalesce, reg, 0);
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etna_cmd_stream_reloc(stream, r);
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}
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}
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#define EMIT_STATE(state_name, src_value) \
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etna_coalsence_emit(stream, &coalesce, VIVS_##state_name, src_value)
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@@ -34,6 +34,12 @@
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struct etna_context;
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struct compiled_rs_state;
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struct etna_coalesce {
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uint32_t start;
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uint32_t last_reg;
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uint32_t last_fixp;
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};
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static inline void
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etna_emit_load_state(struct etna_cmd_stream *stream, const uint16_t offset,
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const uint16_t count, const int fixp)
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@@ -138,6 +144,83 @@ etna_draw_instanced(struct etna_cmd_stream *stream,
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etna_cmd_stream_emit(stream, 0);
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}
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static inline void
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etna_coalesce_start(struct etna_cmd_stream *stream,
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struct etna_coalesce *coalesce)
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{
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coalesce->start = etna_cmd_stream_offset(stream);
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coalesce->last_reg = 0;
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coalesce->last_fixp = 0;
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}
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static inline void
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etna_coalesce_end(struct etna_cmd_stream *stream,
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struct etna_coalesce *coalesce)
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{
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uint32_t end = etna_cmd_stream_offset(stream);
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uint32_t size = end - coalesce->start;
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if (size) {
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uint32_t offset = coalesce->start - 1;
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uint32_t value = etna_cmd_stream_get(stream, offset);
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value |= VIV_FE_LOAD_STATE_HEADER_COUNT(size);
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etna_cmd_stream_set(stream, offset, value);
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}
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/* append needed padding */
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if (end % 2 == 1)
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etna_cmd_stream_emit(stream, 0xdeadbeef);
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}
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static inline void
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check_coalsence(struct etna_cmd_stream *stream, struct etna_coalesce *coalesce,
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uint32_t reg, uint32_t fixp)
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{
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if (coalesce->last_reg != 0) {
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if (((coalesce->last_reg + 4) != reg) || (coalesce->last_fixp != fixp)) {
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etna_coalesce_end(stream, coalesce);
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etna_emit_load_state(stream, reg >> 2, 0, fixp);
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coalesce->start = etna_cmd_stream_offset(stream);
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}
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} else {
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etna_emit_load_state(stream, reg >> 2, 0, fixp);
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coalesce->start = etna_cmd_stream_offset(stream);
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}
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coalesce->last_reg = reg;
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coalesce->last_fixp = fixp;
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}
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static inline void
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etna_coalsence_emit(struct etna_cmd_stream *stream,
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struct etna_coalesce *coalesce, uint32_t reg,
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uint32_t value)
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{
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check_coalsence(stream, coalesce, reg, 0);
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etna_cmd_stream_emit(stream, value);
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}
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static inline void
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etna_coalsence_emit_fixp(struct etna_cmd_stream *stream,
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struct etna_coalesce *coalesce, uint32_t reg,
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uint32_t value)
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{
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check_coalsence(stream, coalesce, reg, 1);
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etna_cmd_stream_emit(stream, value);
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}
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static inline void
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etna_coalsence_emit_reloc(struct etna_cmd_stream *stream,
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struct etna_coalesce *coalesce, uint32_t reg,
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const struct etna_reloc *r)
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{
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if (r->bo) {
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check_coalsence(stream, coalesce, reg, 0);
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etna_cmd_stream_reloc(stream, r);
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}
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}
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void
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etna_emit_state(struct etna_context *ctx);
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