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etnaviv: isa: Add type suffixes to immediate value encoding

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The assembler and disassembler now use explicit type suffixes for all
immediate values to ensure correct round-trip encoding:

  - :f20  - 20-bit float (upper 20 bits of IEEE 754 single precision)
  - :f16  - 16-bit half-float
  - :s20  - 20-bit signed integer (two's complement)
  - :u20  - 20-bit unsigned integer

Previously, the parser did not distinguish between signed and unsigned
integers, causing incorrect encoding. The signed format uses 20-bit
two's complement where bit 19 is the sign bit and maps to AMODE[0] in
the instruction encoding.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39016>
This commit is contained in:
Christian Gmeiner
2025-12-01 00:14:48 +01:00
committed by Marge Bot
parent 187233339a
commit 776c1a7039
4 changed files with 91 additions and 61 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
src/etnaviv/isa/etnaviv.xml
View File

@@ -251,7 +251,7 @@ SPDX-License-Identifier: MIT
</expr>
<display>
{IMMED}
{IMMED}:f20
</display>
<derived name="IMMED" type="float" width="32">
@@ -271,7 +271,7 @@ SPDX-License-Identifier: MIT
</expr>
<display>
{IMMED}
{IMMED}:s20
</display>
<derived name="IMMED" type="int" width="20">
@@ -291,7 +291,7 @@ SPDX-License-Identifier: MIT
</expr>
<display>
{IMMED}
{IMMED}:u20
</display>
<derived name="IMMED" type="uint" width="20">
@@ -311,7 +311,7 @@ SPDX-License-Identifier: MIT
</expr>
<display>
{IMMED}
{IMMED}:f16
</display>
<derived name="IMMED" type="float" width="16">

45
src/etnaviv/isa/parser.rs
View File

@@ -26,6 +26,20 @@ where
item.as_str().parse::<T>().unwrap()
}
fn parse_numeric<T: FromStr>(item: Pair<Rule>) -> T
where
T::Err: std::fmt::Debug,
{
let cleaned = item.as_str();
// strip suffixes like :s20, :u20, :f16, :f20
let cleaned = if let Some((number, _type)) = cleaned.split_once(':') {
number
} else {
cleaned
};
cleaned.parse::<T>().unwrap()
}
fn fill_swizzle(item: Pair<Rule>) -> u32 {
assert!(item.as_rule() == Rule::SrcSwizzle);
@@ -134,8 +148,8 @@ fn fill_source(pair: Pair<Rule>, src: &mut etna_inst_src, dual_16_mode: bool) {
imm_struct.set_imm_type(0);
imm_struct.set_imm_val(0xfffff);
}
Rule::Immediate_float => {
let value: f32 = parse_pair(item);
Rule::Immediate_float | Rule::Immediate_half_float => {
let value: f32 = parse_numeric(item);
let bits = value.to_bits();
assert!((bits & 0xfff) == 0); /* 12 lsb cut off */
@@ -147,17 +161,32 @@ fn fill_source(pair: Pair<Rule>, src: &mut etna_inst_src, dual_16_mode: bool) {
imm_struct.set_imm_type(imm_type);
imm_struct.set_imm_val(bits >> 12);
}
i_type @ (Rule::Immediate_int | Rule::Immediate_uint) => {
let value = if i_type == Rule::Immediate_int {
parse_pair::<i32>(item) as u32
} else {
parse_pair::<u32>(item)
};
Rule::Immediate_int => {
let value: i32 = parse_numeric(item);
assert!(
(-0x80000..=0x7ffff).contains(&value),
"Immediate_int out of 20-bit signed range: {value}"
);
src.set_rgroup(isa_reg_group::ISA_REG_GROUP_IMMED);
let imm_struct = unsafe { &mut src.__bindgen_anon_1.__bindgen_anon_2 };
// 20-bit two's-complement
let imm_val = (value as u32) & 0xfffff;
imm_struct.set_imm_type(1);
imm_struct.set_imm_val(imm_val);
}
Rule::Immediate_uint => {
let value: u32 = parse_numeric(item);
assert!(value <= 0xfffff, "Immediate_uint out of range: {value}");
src.set_rgroup(isa_reg_group::ISA_REG_GROUP_IMMED);
let imm_struct = unsafe { &mut src.__bindgen_anon_1.__bindgen_anon_2 };
imm_struct.set_imm_type(2);
imm_struct.set_imm_val(value);
}
Rule::SrcSwizzle => {

11
src/etnaviv/isa/static_rules.pest
View File

@@ -23,12 +23,13 @@ Negate = { "-" }
Absolute = { "|" }
Immediate_Minus_Nan = @{ Negate ~ "nan" }
Immediate_float = @{ Negate? ~ ASCII_DIGIT* ~ "." ~ ASCII_DIGIT* }
Immediate_int = @{ Negate ~ ASCII_DIGIT* }
Immediate_uint = @{ ASCII_DIGIT* }
Immediate = _{ Immediate_Minus_Nan | Immediate_float | Immediate_int | Immediate_uint }
Immediate_float = @{ Negate? ~ ASCII_DIGIT+ ~ "." ~ ASCII_DIGIT+ ~ ":f20" }
Immediate_half_float = @{ Negate? ~ ASCII_DIGIT+ ~ "." ~ ASCII_DIGIT+ ~ ":f16" }
Immediate_uint = @{ ASCII_DIGIT+ ~ ":u20" }
Immediate_int = @{ Negate? ~ ASCII_DIGIT+ ~ ":s20" }
Immediate = _{ Immediate_Minus_Nan | Immediate_float | Immediate_half_float | Immediate_uint | Immediate_int }
Register = { ASCII_DIGIT* }
Register = @{ ASCII_DIGIT+ }
DstRegister = ${ "t" ~ Register ~ RegAddressingMode? ~ Wrmask? }
DstMemAddr = ${ "mem" ~ Wrmask? }
SrcSwizzle = ${ "." ~ Swiz ~ Swiz ~ Swiz ~ Swiz }

88
src/etnaviv/isa/tests/disasm.cpp
View File

@@ -150,23 +150,23 @@ INSTANTIATE_TEST_SUITE_P(Opcodes, DisasmTest,
disasm_state{ {0x00801021, 0x00000004, 0x00000000, 0x00000008}, "sqrt t0.x___, void, void, t0.xxxx\n" },
disasm_state{ {0x03001022, 0x00000005, 0x00000000, 0x00154008}, "sin.rtz t0.zy, void, void, t0.yyyy\n" },
disasm_state{ {0x01801023, 0x00000005, 0x00000000, 0x00000008}, "cos.rtz t0.xy__, void, void, t0.xxxx\n" },
disasm_state{ {0x000001a4, 0x3e401804, 0x500000c0, 0x00000487}, "branch_any.ne.s32 void, t1.yzww, 1, 9\t; dontcare bits in branch_any: 00000000000000000000000400000000\n", FLAG_FAILING_ASM},
disasm_state{ {0x000001a4, 0x3e401804, 0x500000c0, 0x00000487}, "branch_any.ne.s32 void, t1.yzww, 1:s20, 9\t; dontcare bits in branch_any: 00000000000000000000000400000000\n", FLAG_FAILING_ASM},
disasm_state{ {0x00801025, 0x00000004, 0x00000000, 0x00000008}, "floor t0.x___, void, void, t0.xxxx\n"},
disasm_state{ {0x00801026, 0x00000004, 0x00000000, 0x00000008}, "ceil t0.x___, void, void, t0.xxxx\n"},
disasm_state{ {0x00801027, 0x00000004, 0x00000000, 0x00000008}, "sign t0.x___, void, void, t0.xxxx\n" },
disasm_state{ {0x0000002a, 0x00000000, 0x00000000, 0x00000000}, "barrier void, void, void, void\n" },
disasm_state{ {0x0787102b, 0x39202804, 0xc0a802c0, 0x781fdffa}, "swizzle.u8 t7, t2.xyzw, u5.xyyy, 65535\n", FLAG_FAILING_ASM },
disasm_state{ {0x0080102c, 0x00200804, 0x50001040, 0x00000007}, "i2i.s16 t0.x___, t0.xxxx, 32, void\n" },
disasm_state{ {0x0787102b, 0x39202804, 0xc0a802c0, 0x781fdffa}, "swizzle.u8 t7, t2.xyzw, u5.xyyy, 65535:u20\n"},
disasm_state{ {0x0080102c, 0x00200804, 0x50001040, 0x00000007}, "i2i.s16 t0.x___, t0.xxxx, 32:s20, void\n" },
disasm_state{ {0x0381102d, 0x00201804, 0x40000000, 0x00000000}, "i2f.s16 t1.xyz_, t1.xxxx, void, void\n"},
disasm_state{ {0x0101102e, 0x00201804, 0x80000020, 0x00002000}, "f2i.u32.t0 t1._y__, th1.xxxx, void, void\n"},
disasm_state{ {0x0081102f, 0x00000806, 0x40000000, 0x00000000}, "f2irnd.s32.rtne t1.x___, t0.xxxx, void, void\n"},
disasm_state{ {0x00811131, 0x80001800, 0x00aa0040, 0x202a800a}, "cmp.le.pack t1.x___, |t1.xxxx|, u0.yyyy, u0.zzzz\n"},
disasm_state{ {0x00801032, 0x00000c04, 0x10000050, 0x00000007}, "load.denorm t0.x___, u0.xxxx, 0, void\n"},
disasm_state{ {0x00800033, 0x00000c84, 0x10000050, 0x0000000f}, "store.skpHp.denorm mem.x___, u0.xxxx, 0, t0.xxxx\n"},
disasm_state{ {0x00801032, 0x00000c04, 0x10000050, 0x00000007}, "load.denorm t0.x___, u0.xxxx, 0:s20, void\n"},
disasm_state{ {0x00800033, 0x00000c84, 0x10000050, 0x0000000f}, "store.skpHp.denorm mem.x___, u0.xxxx, 0:s20, t0.xxxx\n"},
disasm_state{ {0x00801036, 0x15400804, 0x01540050, 0x00000002}, "clamp0_max t0.x___, u0.yyyy, u0.zzzz, void\n"},
disasm_state{ {0x0080103b, 0x00001804, 0x40000000, 0x00400028}, "iaddsat.s32 t0.x___, t1.xxxx, void, -t2.xxxx\n"},
disasm_state{ {0x01001008, 0x15400804, 0xd00100c0, 0x00000007}, "imod.u16 t0._y__, t0.yyyy, 1, void\n"},
disasm_state{ {0x07811009, 0x15001f20, 0x01ff00c0, 0x78021008}, "txf t1, tex0.xyzw, t1.xyyy, t1.wwww, 4352\n", FLAG_FAILING_ASM},
disasm_state{ {0x01001008, 0x15400804, 0xd00100c0, 0x00000007}, "imod.u16 t0._y__, t0.yyyy, 1:s20, void\n"},
disasm_state{ {0x07811009, 0x15001f20, 0x01ff00c0, 0x78021008}, "txf t1, tex0.xyzw, t1.xyyy, t1.wwww, 4352:u20\n"},
disasm_state{ {0x0080103c, 0x00001804, 0x40000140, 0x00000000}, "imullo0.s32 t0.x___, t1.xxxx, t2.xxxx, void\n"},
disasm_state{ {0x00801000, 0x00001804, 0x40010140, 0x00000000}, "imulhi0.s32 t0.x___, t1.xxxx, t2.xxxx, void\n"},
disasm_state{ {0x00801004, 0x00201804, 0x40010040, 0x00000000}, "idiv0.s16 t0.x___, t1.xxxx, t0.xxxx, void\n"},
@@ -180,19 +180,19 @@ INSTANTIATE_TEST_SUITE_P(Opcodes, DisasmTest,
disasm_state{ {0x02000016, 0x00200000, 0x80010000, 0x003fc018}, "movai.u32.pack void, void, void, t1.wwww\n", FLAG_FAILING_ASM},
disasm_state{ {0x00801017, 0x00000004, 0x40010000, 0x00000018}, "iabs.s32 t0.x___, void, void, t1.xxxx\n"},
disasm_state{ {0x00801018, 0x00000004, 0x40010000, 0x00000008}, "leadzero.s32 t0.x___, void, void, t0.xxxx\n"},
disasm_state{ {0x00801019, 0x15400804, 0x40010000, 0x74000028}, "lshift.s32 t0.x___, t0.yyyy, void, 2\n"},
disasm_state{ {0x0080101a, 0x00001804, 0x40010000, 0x78000018}, "rshift.s32 t0.x___, t1.xxxx, void, 1\n", FLAG_FAILING_ASM},
disasm_state{ {0x00801019, 0x15400804, 0x40010000, 0x74000028}, "lshift.s32 t0.x___, t0.yyyy, void, 2:s20\n"},
disasm_state{ {0x0080101a, 0x00001804, 0x40010000, 0x78000018}, "rshift.s32 t0.x___, t1.xxxx, void, 1:u20\n"},
disasm_state{ {0x0080101b, 0x00001804, 0x40010000, 0x00000008}, "rotate.s32 t0.x___, t1.xxxx, void, t0.xxxx\n"},
disasm_state{ {0x03001024, 0x00000005, 0x04098040, 0x0015400f}, "div.rtz t0.zy, void, 4.500000, t0.yyyy\n"},
disasm_state{ {0x01061025, 0x2aa00804, 0xa0010050, 0x7800001f}, "atomic_add.u32 t6._y__, u0.zzzz, 0, 1\n", FLAG_FAILING_ASM},
disasm_state{ {0x00801025, 0x2a800884, 0x50010050, 0x0000000f}, "atomic_add.skpHp.s32 t0.x___, u0.zzzz, 0, t0.xxxx\n"},
disasm_state{ {0x00821026, 0x2a800884, 0x50010050, 0x0000001f}, "atomic_xchg.skpHp.s32 t2.x___, u0.zzzz, 0, t1.xxxx\n"},
disasm_state{ {0x00801027, 0x2a800884, 0x50010050, 0x0015000f}, "atomic_cmp_xchg.skpHp.s32 t0.x___, u0.zzzz, 0, t0.xyyy\n"},
disasm_state{ {0x00821028, 0x2a800884, 0x50010050, 0x0000001f}, "atomic_min.skpHp.s32 t2.x___, u0.zzzz, 0, t1.xxxx\n"},
disasm_state{ {0x00821029, 0x2a800884, 0x50010050, 0x0000000f}, "atomic_max.skpHp.s32 t2.x___, u0.zzzz, 0, t0.xxxx\n"},
disasm_state{ {0x0080102a, 0x2a800884, 0x50010050, 0x0000000f}, "atomic_or.skpHp.s32 t0.x___, u0.zzzz, 0, t0.xxxx\n"},
disasm_state{ {0x0082102b, 0x2a800884, 0x50010050, 0x0000001f}, "atomic_and.skpHp.s32 t2.x___, u0.zzzz, 0, t1.xxxx\n"},
disasm_state{ {0x0080102c, 0x2a800884, 0x50010050, 0x0000001f}, "atomic_xor.skpHp.s32 t0.x___, u0.zzzz, 0, t1.xxxx\n"},
disasm_state{ {0x03001024, 0x00000005, 0x04098040, 0x0015400f}, "div.rtz t0.zy, void, 4.500000:f20, t0.yyyy\n"},
disasm_state{ {0x01061025, 0x2aa00804, 0xa0010050, 0x7800001f}, "atomic_add.u32 t6._y__, u0.zzzz, 0:u20, 1:u20\n"},
disasm_state{ {0x00801025, 0x2a800884, 0x50010050, 0x0000000f}, "atomic_add.skpHp.s32 t0.x___, u0.zzzz, 0:s20, t0.xxxx\n"},
disasm_state{ {0x00821026, 0x2a800884, 0x50010050, 0x0000001f}, "atomic_xchg.skpHp.s32 t2.x___, u0.zzzz, 0:s20, t1.xxxx\n"},
disasm_state{ {0x00801027, 0x2a800884, 0x50010050, 0x0015000f}, "atomic_cmp_xchg.skpHp.s32 t0.x___, u0.zzzz, 0:s20, t0.xyyy\n"},
disasm_state{ {0x00821028, 0x2a800884, 0x50010050, 0x0000001f}, "atomic_min.skpHp.s32 t2.x___, u0.zzzz, 0:s20, t1.xxxx\n"},
disasm_state{ {0x00821029, 0x2a800884, 0x50010050, 0x0000000f}, "atomic_max.skpHp.s32 t2.x___, u0.zzzz, 0:s20, t0.xxxx\n"},
disasm_state{ {0x0080102a, 0x2a800884, 0x50010050, 0x0000000f}, "atomic_or.skpHp.s32 t0.x___, u0.zzzz, 0:s20, t0.xxxx\n"},
disasm_state{ {0x0082102b, 0x2a800884, 0x50010050, 0x0000001f}, "atomic_and.skpHp.s32 t2.x___, u0.zzzz, 0:s20, t1.xxxx\n"},
disasm_state{ {0x0080102c, 0x2a800884, 0x50010050, 0x0000001f}, "atomic_xor.skpHp.s32 t0.x___, u0.zzzz, 0:s20, t1.xxxx\n"},
disasm_state{ {0x0081102d, 0x00001804, 0x40010000, 0x00000000}, "bit_rev.s32 t1.x___, t1.xxxx, void, void\n"},
disasm_state{ {0x00811033, 0x04402804, 0x00ef00c0, 0x00000000}, "dp2 t1.x___, t2.yxyx, t1.wywy, void\n"},
disasm_state{ {0x00811034, 0x15c01804, 0x00010000, 0x00000000}, "norm_dp2 t1.x___, t1.wyyy, void, void\n"},
@@ -201,7 +201,7 @@ INSTANTIATE_TEST_SUITE_P(Opcodes, DisasmTest,
disasm_state{ {0x0b801037, 0x29000804, 0x01ff0040, 0x00000000}, "norm_mul.unk t0.xyz_, t0.xyzz, t0.wwww, void\n"},
disasm_state{ {0x07801039, 0x39204c00, 0x80a90050, 0x00000000}, "img_load.denorm.u32.pack t0, u4.xyzw, t0.xyyy, void\n"},
disasm_state{ {0x0780083a, 0x39200c00, 0x80a90050, 0x00390018}, "img_store.sat.denorm.u32.pack mem, u0.xyzw, t0.xyyy, t1.xyzw\n"},
disasm_state{ {0x0781103d, 0x15001f20, 0x100101c0, 0x00000007}, "tg4 t1, tex0.xyzw, t1.xyyy, 3, void\n"},
disasm_state{ {0x0781103d, 0x15001f20, 0x100101c0, 0x00000007}, "tg4 t1, tex0.xyzw, t1.xyyy, 3:s20, void\n"},
disasm_state{ {0x0381103f, 0x29201804, 0x80010000, 0x780000b8}, "bit_findlsb.u32 t1.xyz_, t1.xyzz, void, void\n"},
disasm_state{ {0x0081103f, 0x00001804, 0x40010000, 0x780000c8}, "bit_findmsb.s32 t1.x___, t1.xxxx, void, void\n"}
)
@@ -272,9 +272,9 @@ INSTANTIATE_TEST_SUITE_P(Threads, DisasmTest,
// full dual-16 shader from a deqp3 run on GC3000
disasm_state{ {0x0101102e, 0x00201804, 0x80000020, 0x00002000}, "f2i.u32.t0 t1._y__, th1.xxxx, void, void\n", FLAG_DUAL_16},
disasm_state{ {0x0101102e, 0x00202804, 0x80000020, 0x01000000}, "f2i.u32.t1 t1._y__, th2.xxxx, void, void\n", FLAG_DUAL_16},
disasm_state{ {0x00811171, 0x15601804, 0x80000040, 0x76fffffa}, "cmp.eq.u32.t0 t1.x___, t1.yyyy, u0.xxxx, -1\n", FLAG_DUAL_16},
disasm_state{ {0x00811171, 0x15601804, 0x80000040, 0x77ffdffa}, "cmp.eq.u32.t1 t1.x___, t1.yyyy, u0.xxxx, -1\n", FLAG_DUAL_16},
disasm_state{ {0x0081158f, 0x00201804, 0x700000c0, 0x7c00000f}, "select.selmsb.s16 t1.x___, t1.xxxx, 0.000000, 0.000000\n", FLAG_DUAL_16 | FLAG_FAILING_ASM},
disasm_state{ {0x00811171, 0x15601804, 0x80000040, 0x76fffffa}, "cmp.eq.u32.t0 t1.x___, t1.yyyy, u0.xxxx, -1:s20\n", FLAG_DUAL_16},
disasm_state{ {0x00811171, 0x15601804, 0x80000040, 0x77ffdffa}, "cmp.eq.u32.t1 t1.x___, t1.yyyy, u0.xxxx, -1:s20\n", FLAG_DUAL_16},
disasm_state{ {0x0081158f, 0x00201804, 0x700000c0, 0x7c00000f}, "select.selmsb.s16 t1.x___, t1.xxxx, 0.000000:f16, 0.000000:f16\n", FLAG_DUAL_16 | FLAG_FAILING_ASM},
disasm_state{ {0x0381102d, 0x00201804, 0x40000000, 0x00000000}, "i2f.s16 t1.xyz_, t1.xxxx, void, void\n", FLAG_DUAL_16},
disasm_state{ {0x04011009, 0x00000004, 0x00000000, 0x20154008}, "mov t1.___w, void, void, u0.yyyy\n", FLAG_DUAL_16}
)
@@ -285,10 +285,10 @@ INSTANTIATE_TEST_SUITE_P(Threads, DisasmTest,
INSTANTIATE_TEST_SUITE_P(ImmediateValues, DisasmTest,
testing::Values(
// taken from deqp3 run on GC3000
disasm_state{ {0x00801001, 0x7e000805, 0x00000038, 0x00800008}, "add.rtz t0.x___, 0.500000, void, |t0.xxxx|\n"}, /* type: 0 */
disasm_state{ {0x00811131, 0x95401804, 0x00aa0060, 0x76fffffa}, "cmp.le.t0 t1.x___, |th1.yyyy|, u0.yyyy, -1\n"}, /* type: 1 */
disasm_state{ {0x0080101a, 0x00001804, 0x40010000, 0x78000018}, "rshift.s32 t0.x___, t1.xxxx, void, 1\n", FLAG_FAILING_ASM}, /* type: 2*/
disasm_state{ {0x020211b1, 0x00001804, 0x01fe0040, 0x7c1fdffa}, "cmp.ne t2.__z_, t1.xxxx, u0.wwww, -nan\n", FLAG_FAILING_ASM} /* type: 3 */
disasm_state{ {0x00801001, 0x7e000805, 0x00000038, 0x00800008}, "add.rtz t0.x___, 0.500000:f20, void, |t0.xxxx|\n"}, /* type: 0 */
disasm_state{ {0x00811131, 0x95401804, 0x00aa0060, 0x76fffffa}, "cmp.le.t0 t1.x___, |th1.yyyy|, u0.yyyy, -1:s20\n"}, /* type: 1 */
disasm_state{ {0x0080101a, 0x00001804, 0x40010000, 0x78000018}, "rshift.s32 t0.x___, t1.xxxx, void, 1:u20\n"}, /* type: 2*/
disasm_state{ {0x020211b1, 0x00001804, 0x01fe0040, 0x7c1fdffa}, "cmp.ne t2.__z_, t1.xxxx, u0.wwww, -nan:f16\n", FLAG_FAILING_ASM} /* type: 3 */
)
);
// clang-format on
@@ -297,10 +297,10 @@ INSTANTIATE_TEST_SUITE_P(ImmediateValues, DisasmTest,
INSTANTIATE_TEST_SUITE_P(LoadStore, DisasmTest,
testing::Values(
// full opencl shader on GC3000
disasm_state{ {0x00801032, 0x00000c04, 0x10000050, 0x00000007}, "load.denorm t0.x___, u0.xxxx, 0, void\n"},
disasm_state{ {0x00811032, 0x15400c04, 0x10000050, 0x00000007}, "load.denorm t1.x___, u0.yyyy, 0, void\n"},
disasm_state{ {0x00801032, 0x00000c04, 0x10000050, 0x00000007}, "load.denorm t0.x___, u0.xxxx, 0:s20, void\n"},
disasm_state{ {0x00811032, 0x15400c04, 0x10000050, 0x00000007}, "load.denorm t1.x___, u0.yyyy, 0:s20, void\n"},
disasm_state{ {0x00801001, 0x00001804, 0x00000000, 0x00000008}, "add t0.x___, t1.xxxx, void, t0.xxxx\n"},
disasm_state{ {0x00800033, 0x00000c84, 0x10000050, 0x0000000f}, "store.skpHp.denorm mem.x___, u0.xxxx, 0, t0.xxxx\n"}
disasm_state{ {0x00800033, 0x00000c84, 0x10000050, 0x0000000f}, "store.skpHp.denorm mem.x___, u0.xxxx, 0:s20, t0.xxxx\n"}
)
);
// clang-format on
@@ -318,9 +318,9 @@ INSTANTIATE_TEST_SUITE_P(Rounding, DisasmTest,
INSTANTIATE_TEST_SUITE_P(CLRoundShader, DisasmTest,
testing::Values(
// taken from opencl shader on GC3000
disasm_state{ {0x00801032, 0x15400c04, 0x10000050, 0x00000007}, "load.denorm t0.x___, u0.yyyy, 0, void\n"},
disasm_state{ {0x00801032, 0x15400c04, 0x10000050, 0x00000007}, "load.denorm t0.x___, u0.yyyy, 0:s20, void\n"},
disasm_state{ {0x00811027, 0x00000004, 0x00000000, 0x00000008}, "sign t1.x___, void, void, t0.xxxx\n"},
disasm_state{ {0x00801001, 0x7e000805, 0x00000038, 0x00800008}, "add.rtz t0.x___, 0.500000, void, |t0.xxxx|\n"},
disasm_state{ {0x00801001, 0x7e000805, 0x00000038, 0x00800008}, "add.rtz t0.x___, 0.500000:f20, void, |t0.xxxx|\n"},
disasm_state{ {0x00801025, 0x00000004, 0x00000000, 0x00000008}, "floor t0.x___, void, void, t0.xxxx\n"},
disasm_state{ {0x00801003, 0x00001805, 0x00000040, 0x00000000}, "mul.rtz t0.x___, t1.xxxx, t0.xxxx, void\n"}
)
@@ -383,7 +383,7 @@ INSTANTIATE_TEST_SUITE_P(LoadStoreVariants, DisasmTest,
disasm_state{ {0x01001032, 0x15400c14, 0x00000050, 0x00000000}, "load.denorm.ls2 t0._y__, u0.yyyy, t0.xxxx, void\n"},
disasm_state{ {0x01001032, 0x15400d14, 0x00000040, 0x00000000}, "load.denorm.local.ls2 t0._y__, t0.yyyy, t0.xxxx, void\n"},
disasm_state{ {0x00800033, 0x00000c14, 0x00000050, 0x00154008}, "store.denorm.ls2 mem.x___, u0.xxxx, t0.xxxx, t0.yyyy\n"},
disasm_state{ {0x00861033, 0x15400d04, 0x100efe40, 0x7085860f}, "store.denorm.local mem.x___, t0.yyyy, 4092, 99.000000\t; dontcare bits in store: 00000000000000000000000000061000\n", FLAG_FAILING_ASM},
disasm_state{ {0x00861033, 0x15400d04, 0x100efe40, 0x7085860f}, "store.denorm.local mem.x___, t0.yyyy, 4092:s20, 99.000000:f20\t; dontcare bits in store: 00000000000000000000000000061000\n", FLAG_FAILING_ASM},
disasm_state{ {0x07800033, 0x00200c34, 0x80000050, 0x00390018}, "store.denorm.u32.ls6 mem, u0.xxxx, t0.xxxx, t1.xyzw\n"}
)
);
@@ -393,9 +393,9 @@ INSTANTIATE_TEST_SUITE_P(LoadStoreVariants, DisasmTest,
INSTANTIATE_TEST_SUITE_P(ConvVariants, DisasmTest,
testing::Values(
// seen on GC7000
disasm_state{ {0x01001032, 0x15400800, 0x100100c0, 0x00000007}, "conv.pack t0._y__, t0.yyyy, 1, void\n"},
disasm_state{ {0x01001032, 0x15600800, 0x10010040, 0x00000007}, "conv.f16.pack t0._y__, t0.yyyy, 0, void\n"},
disasm_state{ {0x01001832, 0x15400800, 0x100100c0, 0x00000007}, "conv.sat.pack t0._y__, t0.yyyy, 1, void\n"}
disasm_state{ {0x01001032, 0x15400800, 0x100100c0, 0x00000007}, "conv.pack t0._y__, t0.yyyy, 1:s20, void\n"},
disasm_state{ {0x01001032, 0x15600800, 0x10010040, 0x00000007}, "conv.f16.pack t0._y__, t0.yyyy, 0:s20, void\n"},
disasm_state{ {0x01001832, 0x15400800, 0x100100c0, 0x00000007}, "conv.sat.pack t0._y__, t0.yyyy, 1:s20, void\n"}
)
);
// clang-format on
@@ -412,14 +412,14 @@ INSTANTIATE_TEST_SUITE_P(ShadowSampler, DisasmTest,
INSTANTIATE_TEST_SUITE_P(SwizzleVariants, DisasmTest,
testing::Values(
// seen on GC7000
disasm_state{ {0x0782102b, 0x00000804, 0xa000007c ,0x7800001f}, "swizzle.s8 t2, 0, 0, 1\n", FLAG_FAILING_ASM },
disasm_state{ {0x0782102b, 0x00002804, 0xa0000040, 0x7800002f}, "swizzle.s8 t2, t2.xxxx, 0, 2\n", FLAG_FAILING_ASM },
disasm_state{ {0x0780102b, 0x00002804, 0xa0000040, 0x7800001f}, "swizzle.s8 t0, t2.xxxx, 0, 1\n", FLAG_FAILING_ASM },
disasm_state{ {0x0781102b, 0x00002804, 0xa00000c0, 0x7800001f}, "swizzle.s8 t1, t2.xxxx, 1, 1\n", FLAG_FAILING_ASM },
disasm_state{ {0x0781102b, 0x00200804, 0x6000007e, 0x7800003f}, "swizzle.s16 t1, 0.000000, 0, 3\n", FLAG_FAILING_ASM },
disasm_state{ {0x0781102b, 0x00201804, 0x60000040, 0x780000cf}, "swizzle.s16 t1, t1.xxxx, 0, 12\n", FLAG_FAILING_ASM },
disasm_state{ {0x0780102b, 0x00201804, 0x60000040, 0x7800003f}, "swizzle.s16 t0, t1.xxxx, 0, 3\n", FLAG_FAILING_ASM },
disasm_state{ {0x0781102b, 0x00202804, 0x600000c0, 0x7800003f}, "swizzle.s16 t1, t2.xxxx, 1, 3\n", FLAG_FAILING_ASM }
disasm_state{ {0x0782102b, 0x00000804, 0xa000007c ,0x7800001f}, "swizzle.s8 t2, 0:u20, 0:u20, 1:u20\n"},
disasm_state{ {0x0782102b, 0x00002804, 0xa0000040, 0x7800002f}, "swizzle.s8 t2, t2.xxxx, 0:u20, 2:u20\n"},
disasm_state{ {0x0780102b, 0x00002804, 0xa0000040, 0x7800001f}, "swizzle.s8 t0, t2.xxxx, 0:u20, 1:u20\n"},
disasm_state{ {0x0781102b, 0x00002804, 0xa00000c0, 0x7800001f}, "swizzle.s8 t1, t2.xxxx, 1:u20, 1:u20\n"},
disasm_state{ {0x0781102b, 0x00200804, 0x6000007e, 0x7800003f}, "swizzle.s16 t1, 0.000000:f16, 0:u20, 3:u20\n", FLAG_FAILING_ASM},
disasm_state{ {0x0781102b, 0x00201804, 0x60000040, 0x780000cf}, "swizzle.s16 t1, t1.xxxx, 0:u20, 12:u20\n"},
disasm_state{ {0x0780102b, 0x00201804, 0x60000040, 0x7800003f}, "swizzle.s16 t0, t1.xxxx, 0:u20, 3:u20\n"},
disasm_state{ {0x0781102b, 0x00202804, 0x600000c0, 0x7800003f}, "swizzle.s16 t1, t2.xxxx, 1:u20, 3:u20\n"}
)
);
// clang-format on