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gallium/radeon: rename RADEON_FLAG_HANDLE -> RADEON_FLAG_NO_SUBALLOC

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Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
Marek Olšák
2017-06-27 19:37:43 +02:00
parent e6dbe975ef
commit 7525c3e123
6 changed files with 9 additions and 9 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/gallium/drivers/r300/r300_texture.c
+1 -1
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@@ -1119,7 +1119,7 @@ r300_texture_create_object(struct r300_screen *rscreen,
/* Create the backing buffer if needed. */
if (!tex->buf) {
tex->buf = rws->buffer_create(rws, tex->tex.size_in_bytes, 2048,
tex->domain, RADEON_FLAG_HANDLE);
tex->domain, RADEON_FLAG_NO_SUBALLOC);
if (!tex->buf) {
goto fail;
src/gallium/drivers/radeon/r600_texture.c
+1 -1
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@@ -1206,7 +1206,7 @@ r600_texture_create_object(struct pipe_screen *screen,
r600_init_resource_fields(rscreen, resource, rtex->size,
rtex->surface.surf_alignment);
resource->flags |= RADEON_FLAG_HANDLE;
resource->flags |= RADEON_FLAG_NO_SUBALLOC;
if (!r600_alloc_resource(rscreen, resource)) {
FREE(rtex);
src/gallium/drivers/radeon/radeon_winsys.h
+1 -1
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@@ -53,7 +53,7 @@ enum radeon_bo_flag { /* bitfield */
RADEON_FLAG_GTT_WC = (1 << 0),
RADEON_FLAG_CPU_ACCESS = (1 << 1),
RADEON_FLAG_NO_CPU_ACCESS = (1 << 2),
RADEON_FLAG_HANDLE = (1 << 3), /* the buffer must not be suballocated */
RADEON_FLAG_NO_SUBALLOC = (1 << 3),
RADEON_FLAG_SPARSE = (1 << 4),
};
src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
+3 -3
View File
@@ -690,7 +690,7 @@ sparse_backing_alloc(struct amdgpu_winsys_bo *bo, uint32_t *pstart_page, uint32_
buf = amdgpu_bo_create(&bo->ws->base, size, RADEON_SPARSE_PAGE_SIZE,
bo->initial_domain,
bo->u.sparse.flags | RADEON_FLAG_HANDLE);
bo->u.sparse.flags | RADEON_FLAG_NO_SUBALLOC);
if (!buf) {
FREE(best_backing->chunks);
FREE(best_backing);
@@ -1156,7 +1156,7 @@ amdgpu_bo_create(struct radeon_winsys *rws,
unsigned usage = 0, pb_cache_bucket;
/* Sub-allocate small buffers from slabs. */
if (!(flags & (RADEON_FLAG_HANDLE | RADEON_FLAG_SPARSE)) &&
if (!(flags & (RADEON_FLAG_NO_SUBALLOC | RADEON_FLAG_SPARSE)) &&
size <= (1 << AMDGPU_SLAB_MAX_SIZE_LOG2) &&
alignment <= MAX2(1 << AMDGPU_SLAB_MIN_SIZE_LOG2, util_next_power_of_two(size))) {
struct pb_slab_entry *entry;
@@ -1212,7 +1212,7 @@ no_slab:
}
/* This flag is irrelevant for the cache. */
flags &= ~RADEON_FLAG_HANDLE;
flags &= ~RADEON_FLAG_NO_SUBALLOC;
/* Align size to page size. This is the minimum alignment for normal
* BOs. Aligning this here helps the cached bufmgr. Especially small BOs,
src/gallium/winsys/radeon/drm/radeon_drm_bo.c
+2 -2
View File
@@ -943,7 +943,7 @@ radeon_winsys_bo_create(struct radeon_winsys *rws,
return NULL;
/* Sub-allocate small buffers from slabs. */
if (!(flags & RADEON_FLAG_HANDLE) &&
if (!(flags & RADEON_FLAG_NO_SUBALLOC) &&
size <= (1 << RADEON_SLAB_MAX_SIZE_LOG2) &&
ws->info.has_virtual_memory &&
alignment <= MAX2(1 << RADEON_SLAB_MIN_SIZE_LOG2, util_next_power_of_two(size))) {
@@ -991,7 +991,7 @@ radeon_winsys_bo_create(struct radeon_winsys *rws,
no_slab:
/* This flag is irrelevant for the cache. */
flags &= ~RADEON_FLAG_HANDLE;
flags &= ~RADEON_FLAG_NO_SUBALLOC;
/* Align size to page size. This is the minimum alignment for normal
* BOs. Aligning this here helps the cached bufmgr. Especially small BOs,
src/gallium/winsys/radeon/drm/radeon_drm_cs.c
+1 -1
View File
@@ -751,7 +751,7 @@ radeon_cs_create_fence(struct radeon_winsys_cs *rcs)
/* Create a fence, which is a dummy BO. */
fence = cs->ws->base.buffer_create(&cs->ws->base, 1, 1,
RADEON_DOMAIN_GTT, RADEON_FLAG_HANDLE);
RADEON_DOMAIN_GTT, RADEON_FLAG_NO_SUBALLOC);
if (!fence)
return NULL;