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radeonsi/vcn: Add decode support for gfx940

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Add VCN decode for gfx940

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22158>
This commit is contained in:
Sonny Jiang
2023-02-02 15:44:06 -05:00
committed by Marge Bot
parent 73ba47e87b
commit 74bf0cdc9d
1 changed files with 8 additions and 4 deletions
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src/gallium/drivers/radeonsi/radeon_vcn_dec.c
+8 -4
View File
@@ -2178,7 +2178,8 @@ static struct pb_buffer *rvcn_dec_message_decode(struct radeon_decoder *dec,
decode->sw_ctxt_size = RDECODE_SESSION_CONTEXT_SIZE;
decode->db_pitch = align(dec->base.width, dec->db_alignment);
if (((struct si_screen*)dec->screen)->info.family >= CHIP_NAVI21 &&
if ((((struct si_screen*)dec->screen)->info.family >= CHIP_NAVI21 ||
((struct si_screen*)dec->screen)->info.family == CHIP_GFX940) &&
(dec->stream_type == RDECODE_CODEC_VP9 || dec->stream_type == RDECODE_CODEC_AV1 ||
dec->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10))
decode->db_aligned_height = align(dec->base.height, 64);
@@ -3069,7 +3070,7 @@ struct pipe_video_codec *radeon_create_decoder(struct pipe_context *context,
dec->ws = ws;
if (u_reduce_video_profile(templ->profile) != PIPE_VIDEO_FORMAT_JPEG &&
sctx->gfx_level >= GFX11) {
(sctx->gfx_level >= GFX11 || sctx->family == CHIP_GFX940)) {
dec->vcn_dec_sw_ring = true;
ring = AMD_IP_VCN_UNIFIED;
}
@@ -3111,7 +3112,8 @@ struct pipe_video_codec *radeon_create_decoder(struct pipe_context *context,
for (i = 0; i < ARRAY_SIZE(dec->render_pic_list); i++)
dec->render_pic_list[i] = NULL;
if (sctx->family >= CHIP_NAVI21 && (stream_type == RDECODE_CODEC_H264_PERF)) {
if ((sctx->family >= CHIP_NAVI21 || sctx->family == CHIP_GFX940) &&
(stream_type == RDECODE_CODEC_H264_PERF)) {
for (i = 0; i < ARRAY_SIZE(dec->h264_valid_ref_num); i++)
dec->h264_valid_ref_num[i] = (unsigned) -1;
for (i = 0; i < ARRAY_SIZE(dec->h264_valid_poc_num); i++)
@@ -3157,7 +3159,7 @@ struct pipe_video_codec *radeon_create_decoder(struct pipe_context *context,
}
}
if (sctx->family >= CHIP_NAVI21 &&
if ((sctx->family >= CHIP_NAVI21 || sctx->family == CHIP_GFX940) &&
(stream_type == RDECODE_CODEC_VP9 ||
stream_type == RDECODE_CODEC_AV1 ||
((stream_type == RDECODE_CODEC_H265) && templ->expect_chunked_decode) ||
@@ -3221,6 +3223,8 @@ struct pipe_video_codec *radeon_create_decoder(struct pipe_context *context,
break;
case CHIP_GFX940:
dec->jpg_reg.version = RDECODE_JPEG_REG_VER_V3;
dec->addr_gfx_mode = RDECODE_ARRAY_MODE_ADDRLIB_SEL_GFX9;
dec->av1_version = RDECODE_AV1_VER_1;
break;
case CHIP_GFX1100:
case CHIP_GFX1101: