iris: Fix MOCS for blits and clears
I915_MOCS_CACHED is the wrong value. Expose mocs() and use that.
This commit is contained in:
@@ -221,7 +221,8 @@ apply_blit_scissor(const struct pipe_scissor_state *scissor,
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}
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void
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iris_blorp_surf_for_resource(struct blorp_surf *surf,
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iris_blorp_surf_for_resource(struct iris_vtable *vtbl,
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struct blorp_surf *surf,
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struct pipe_resource *p_res,
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enum isl_aux_usage aux_usage,
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unsigned level,
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@@ -239,7 +240,7 @@ iris_blorp_surf_for_resource(struct blorp_surf *surf,
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.buffer = res->bo,
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.offset = 0, // XXX: ???
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.reloc_flags = is_render_target ? EXEC_OBJECT_WRITE : 0,
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.mocs = I915_MOCS_CACHED, // XXX: BDW MOCS, PTE MOCS
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.mocs = vtbl->mocs(res->bo),
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},
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.aux_usage = aux_usage,
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};
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@@ -250,7 +251,7 @@ iris_blorp_surf_for_resource(struct blorp_surf *surf,
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.buffer = res->aux.bo,
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.offset = res->aux.offset,
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.reloc_flags = is_render_target ? EXEC_OBJECT_WRITE : 0,
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.mocs = I915_MOCS_CACHED,
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.mocs = vtbl->mocs(res->bo),
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};
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}
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@@ -310,9 +311,9 @@ iris_blit(struct pipe_context *ctx, const struct pipe_blit_info *info)
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bool dst_clear_supported = dst_aux_usage != ISL_AUX_USAGE_NONE;
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struct blorp_surf src_surf, dst_surf;
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iris_blorp_surf_for_resource(&src_surf, info->src.resource,
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iris_blorp_surf_for_resource(&ice->vtbl, &src_surf, info->src.resource,
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src_aux_usage, info->src.level, false);
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iris_blorp_surf_for_resource(&dst_surf, info->dst.resource,
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iris_blorp_surf_for_resource(&ice->vtbl, &dst_surf, info->dst.resource,
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dst_aux_usage, info->dst.level, true);
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iris_resource_prepare_access(ice, batch, dst_res, info->dst.level, 1,
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@@ -418,9 +419,9 @@ iris_blit(struct pipe_context *ctx, const struct pipe_blit_info *info)
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struct iris_resource *src_res, *dst_res, *junk;
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iris_get_depth_stencil_resources(info->src.resource, &junk, &src_res);
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iris_get_depth_stencil_resources(info->dst.resource, &junk, &dst_res);
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iris_blorp_surf_for_resource(&src_surf, &src_res->base,
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iris_blorp_surf_for_resource(&ice->vtbl, &src_surf, &src_res->base,
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ISL_AUX_USAGE_NONE, info->src.level, false);
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iris_blorp_surf_for_resource(&dst_surf, &dst_res->base,
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iris_blorp_surf_for_resource(&ice->vtbl, &dst_surf, &dst_res->base,
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ISL_AUX_USAGE_NONE, info->dst.level, true);
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for (int slice = 0; slice < info->dst.box.depth; slice++) {
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@@ -520,9 +521,9 @@ iris_resource_copy_region(struct pipe_context *ctx,
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// XXX: what about one surface being a buffer and not the other?
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struct blorp_surf src_surf, dst_surf;
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iris_blorp_surf_for_resource(&src_surf, src, src_aux_usage,
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iris_blorp_surf_for_resource(&ice->vtbl, &src_surf, src, src_aux_usage,
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src_level, false);
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iris_blorp_surf_for_resource(&dst_surf, dst, dst_aux_usage,
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iris_blorp_surf_for_resource(&ice->vtbl, &dst_surf, dst, dst_aux_usage,
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dst_level, true);
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iris_resource_prepare_access(ice, batch, src_res, src_level, 1,
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@@ -72,7 +72,8 @@ clear_color(struct iris_context *ice,
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box->z, box->depth, aux_usage);
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struct blorp_surf surf;
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iris_blorp_surf_for_resource(&surf, p_res, aux_usage, level, true);
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iris_blorp_surf_for_resource(&ice->vtbl, &surf, p_res, aux_usage, level,
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true);
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if (!isl_format_supports_rendering(devinfo, format) &&
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isl_format_is_rgbx(format))
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@@ -129,13 +130,14 @@ clear_depth_stencil(struct iris_context *ice,
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if (z_res) {
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iris_resource_prepare_depth(ice, batch, z_res, level, box->z, box->depth);
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iris_blorp_surf_for_resource(&z_surf, &z_res->base,
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iris_blorp_surf_for_resource(&ice->vtbl, &z_surf, &z_res->base,
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z_res->aux.usage, level, true);
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}
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if (stencil_res) {
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iris_blorp_surf_for_resource(&stencil_surf, &stencil_res->base,
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stencil_res->aux.usage, level, true);
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iris_blorp_surf_for_resource(&ice->vtbl, &stencil_surf,
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&stencil_res->base, stencil_res->aux.usage,
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level, true);
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}
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blorp_clear_depth_stencil(&blorp_batch, &z_surf, &stencil_surf,
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@@ -410,6 +410,7 @@ struct iris_vtable {
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struct brw_wm_prog_key *key);
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void (*populate_cs_key)(const struct iris_context *ice,
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struct brw_cs_prog_key *key);
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uint32_t (*mocs)(const struct iris_bo *bo);
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};
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/**
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@@ -659,7 +660,8 @@ void iris_fill_cs_push_const_buffer(struct brw_cs_prog_data *cs_prog_data,
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/* iris_blit.c */
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void iris_blorp_surf_for_resource(struct blorp_surf *surf,
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void iris_blorp_surf_for_resource(struct iris_vtable *vtbl,
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struct blorp_surf *surf,
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struct pipe_resource *p_res,
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enum isl_aux_usage aux_usage,
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unsigned level,
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@@ -409,8 +409,8 @@ iris_resolve_color(struct iris_context *ice,
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//DBG("%s to mt %p level %u layer %u\n", __FUNCTION__, mt, level, layer);
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struct blorp_surf surf;
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iris_blorp_surf_for_resource(&surf, &res->base, res->aux.usage, level,
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true);
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iris_blorp_surf_for_resource(&ice->vtbl, &surf, &res->base, res->aux.usage,
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level, true);
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iris_batch_maybe_flush(batch, 1500);
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@@ -452,7 +452,8 @@ iris_mcs_partial_resolve(struct iris_context *ice,
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assert(res->aux.usage == ISL_AUX_USAGE_MCS);
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struct blorp_surf surf;
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iris_blorp_surf_for_resource(&surf, &res->base, res->aux.usage, 0, true);
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iris_blorp_surf_for_resource(&ice->vtbl, &surf, &res->base, res->aux.usage,
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0, true);
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struct blorp_batch blorp_batch;
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blorp_batch_init(&ice->blorp, &blorp_batch, batch, 0);
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@@ -590,8 +591,8 @@ iris_hiz_exec(struct iris_context *ice,
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iris_batch_maybe_flush(batch, 1500);
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struct blorp_surf surf;
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iris_blorp_surf_for_resource(&surf, &res->base, ISL_AUX_USAGE_HIZ,
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level, true);
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iris_blorp_surf_for_resource(&ice->vtbl, &surf, &res->base,
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ISL_AUX_USAGE_HIZ, level, true);
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struct blorp_batch blorp_batch;
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blorp_batch_init(&ice->blorp, &blorp_batch, batch,
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@@ -170,7 +170,7 @@ __gen_combine_address(struct iris_batch *batch, void *location,
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#endif
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static uint32_t
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mocs(struct iris_bo *bo)
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mocs(const struct iris_bo *bo)
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{
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return bo && bo->external ? MOCS_PTE : MOCS_WB;
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}
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@@ -5903,6 +5903,7 @@ genX(init_state)(struct iris_context *ice)
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ice->vtbl.populate_gs_key = iris_populate_gs_key;
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ice->vtbl.populate_fs_key = iris_populate_fs_key;
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ice->vtbl.populate_cs_key = iris_populate_cs_key;
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ice->vtbl.mocs = mocs;
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ice->state.dirty = ~0ull;
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