i965: Hook up remaining Sandybridge state packets besides WM.
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@@ -485,6 +485,8 @@ const struct brw_tracked_state brw_line_stipple = {
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static void upload_invarient_state( struct brw_context *brw )
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{
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struct intel_context *intel = &brw->intel;
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{
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/* 0x61040000 Pipeline Select */
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/* PipelineSelect : 0 */
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@@ -496,7 +498,7 @@ static void upload_invarient_state( struct brw_context *brw )
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BRW_BATCH_STRUCT(brw, &ps);
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}
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{
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if (intel->gen < 6) {
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struct brw_global_depth_offset_clamp gdo;
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memset(&gdo, 0, sizeof(gdo));
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@@ -109,18 +109,13 @@ const struct brw_tracked_state *gen6_atoms[] =
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&brw_wm_input_sizes,
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&brw_vs_prog,
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&brw_gs_prog,
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#if 0
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&brw_wm_prog,
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/* Once all the programs are done, we know how large urb entry
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* sizes need to be and can decide if we need to change the urb
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* layout.
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*/
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&brw_curbe_offsets,
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#endif
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&gen6_clip_vp,
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&gen6_sf_vp,
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&gen6_cc_vp,
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/* Command packets: */
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&gen6_viewport_state, /* must do after *_vp stages */
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&gen6_urb,
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@@ -133,43 +128,30 @@ const struct brw_tracked_state *gen6_atoms[] =
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&brw_wm_constant_surface, /* must do before wm surfaces/bind bo */
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&brw_wm_surfaces, /* must do before samplers and unit */
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&brw_wm_samplers,
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&gen6_vs_state,
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&gen6_gs_state,
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&gen6_clip_state,
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#if 0
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&brw_wm_samplers,
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&brw_wm_unit,
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#endif
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&gen6_sf_state,
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/* &gen6_wm_state, */
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&gen6_scissor_state,
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#if 0
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/* Command packets:
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*/
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&brw_invarient_state,
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#endif
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&brw_state_base_address,
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#if 0
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&brw_binding_table_pointers,
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&brw_blend_constant_color,
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#endif
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&gen6_binding_table_pointers,
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&brw_depthbuffer,
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#if 0
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&brw_polygon_stipple,
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&brw_polygon_stipple_offset,
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&brw_line_stipple,
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&brw_aa_line_parameters,
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&brw_psp_urb_cbs,
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#endif
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&brw_drawing_rect,
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&brw_indices,
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