pan/midgard: Clamp LOD register swizzle

Fixes register allocation failures with textureLodOffset. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-12-20 12:34:20 -05:00
parent 06df977c1c
commit 72e5749a63
1 changed files with 4 additions and 0 deletions
@@ -1826,6 +1826,10 @@ emit_texop_native(compiler_context *ctx, nir_tex_instr *instr,

                        ins.texture.lod_register = true;
                        ins.src[2] = index;
+
+                        for (unsigned c = 0; c < MIR_VEC_COMPONENTS; ++c)
+                                ins.swizzle[2][c] = COMPONENT_X;
+
                        emit_explicit_constant(ctx, index, index);

                        break;