r600g: fix segfault with old kernel
Old kernel do not have dma support, patch pushed were missing some of the check needed to not use dma. Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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@@ -321,7 +321,9 @@ static void compute_emit_cs(struct r600_context *ctx, const uint *block_layout,
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ctx->cs_shader_state.shader->resources;
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/* make sure that the gfx ring is only one active */
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ctx->rings.dma.flush(ctx, RADEON_FLUSH_ASYNC);
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if (ctx->rings.dma.cs) {
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ctx->rings.dma.flush(ctx, RADEON_FLUSH_ASYNC);
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}
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/* Initialize all the compute-related registers.
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*
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@@ -151,7 +151,9 @@ static void r600_flush_from_st(struct pipe_context *ctx,
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*rfence = r600_create_fence(rctx);
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}
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/* flush gfx & dma ring, order does not matter as only one can be live */
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rctx->rings.dma.flush(rctx, fflags);
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if (rctx->rings.dma.cs) {
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rctx->rings.dma.flush(rctx, fflags);
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}
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rctx->rings.gfx.flush(rctx, fflags);
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}
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@@ -179,8 +181,10 @@ boolean r600_rings_is_buffer_referenced(struct r600_context *ctx,
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if (ctx->ws->cs_is_buffer_referenced(ctx->rings.gfx.cs, buf, usage)) {
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return TRUE;
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}
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if (ctx->ws->cs_is_buffer_referenced(ctx->rings.dma.cs, buf, usage)) {
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return TRUE;
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if (ctx->rings.dma.cs) {
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if (ctx->ws->cs_is_buffer_referenced(ctx->rings.dma.cs, buf, usage)) {
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return TRUE;
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}
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}
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return FALSE;
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}
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@@ -211,10 +215,12 @@ void *r600_buffer_mmap_sync_with_rings(struct r600_context *ctx,
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return NULL;
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}
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}
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if (ctx->ws->cs_is_buffer_referenced(ctx->rings.dma.cs, resource->cs_buf, rusage) && ctx->rings.dma.cs->cdw) {
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ctx->rings.dma.flush(ctx, flags);
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if (usage & PIPE_TRANSFER_DONTBLOCK) {
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return NULL;
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if (ctx->rings.dma.cs) {
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if (ctx->ws->cs_is_buffer_referenced(ctx->rings.dma.cs, resource->cs_buf, rusage) && ctx->rings.dma.cs->cdw) {
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ctx->rings.dma.flush(ctx, flags);
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if (usage & PIPE_TRANSFER_DONTBLOCK) {
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return NULL;
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}
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}
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}
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@@ -869,7 +869,7 @@ static INLINE unsigned r600_context_bo_reloc(struct r600_context *ctx,
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* look serialized from driver pov
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*/
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if (!ring->flushing) {
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if (ring == &ctx->rings.gfx) {
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if (ring == &ctx->rings.gfx && ctx->rings.dma.cs) {
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/* flush dma ring */
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ctx->rings.dma.flush(ctx, RADEON_FLUSH_ASYNC);
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} else {
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@@ -1274,7 +1274,9 @@ static void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info
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}
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/* make sure that the gfx ring is only one active */
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rctx->rings.dma.flush(rctx, RADEON_FLUSH_ASYNC);
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if (rctx->rings.dma.cs) {
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rctx->rings.dma.flush(rctx, RADEON_FLUSH_ASYNC);
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}
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if (!r600_update_derived_state(rctx)) {
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/* useless to render because current rendering command
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@@ -851,7 +851,9 @@ static void *r600_texture_transfer_map(struct pipe_context *ctx,
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if (usage & PIPE_TRANSFER_READ) {
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r600_copy_to_staging_texture(ctx, trans);
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/* flush gfx & dma ring, order does not matter as only one can be live */
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rctx->rings.dma.flush(rctx, 0);
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if (rctx->rings.dma.cs) {
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rctx->rings.dma.flush(rctx, 0);
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}
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rctx->rings.gfx.flush(rctx, 0);
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}
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} else {
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