brw: Lower certain subgroup size modes in brw_preprocess_nir

This allows us to lower known subgroup size cases earlier, giving us
some earlier optimization opportunities.  We would need to know the
actual SIMD width to handle certain cases, but we can just pass 0 here,
which will lead to get_subgroup_size returning 0 - the same as leaving
this unset.  We can come back to that later during the per-SIMD-width
postprocessing.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36750>

src/intel/compiler/brw_nir.c

@@ -1480,6 +1480,7 @@ brw_preprocess_nir(const struct brw_compiler *compiler, nir_shader *nir,
    OPT(nir_lower_compute_system_values, &lower_csv_options);
 
    const nir_lower_subgroups_options subgroups_options = {
+      .subgroup_size = brw_nir_api_subgroup_size(nir, 0),
       .ballot_bit_size = 32,
       .ballot_components = 1,
       .lower_to_scalar = true,