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i965: Unify Gen4-5 and Gen6 SF_VIEWPORT/CLIP_VIEWPORT code.

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This brings the improved guardbanding we implemented on Gen6+
back to the older Gen4-5 code.  It also deletes piles of code.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
This commit is contained in:
Kenneth Graunke
2017-05-10 23:27:43 -07:00
parent 01cb6cd473
commit 70be2a96a5
3 changed files with 9 additions and 114 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/mesa/drivers/dri/i965/brw_clip_state.c
-20
View File
@@ -35,24 +35,6 @@
#include "brw_defines.h"
#include "main/framebuffer.h"
static void
upload_clip_vp(struct brw_context *brw)
{
struct gl_context *ctx = &brw->ctx;
struct brw_clipper_viewport *vp;
vp = brw_state_batch(brw, sizeof(*vp), 32, &brw->clip.vp_offset);
const float maximum_post_clamp_delta = 4096;
float gbx = maximum_post_clamp_delta / ctx->ViewportArray[0].Width;
float gby = maximum_post_clamp_delta / ctx->ViewportArray[0].Height;
vp->xmin = -gbx;
vp->xmax = gbx;
vp->ymin = -gby;
vp->ymax = gby;
}
static void
brw_upload_clip_unit(struct brw_context *brw)
{
@@ -64,8 +46,6 @@ brw_upload_clip_unit(struct brw_context *brw)
const float fb_width = (float)_mesa_geometric_width(fb);
const float fb_height = (float)_mesa_geometric_height(fb);
upload_clip_vp(brw);
clip = brw_state_batch(brw, sizeof(*clip), 32, &brw->clip.state_offset);
memset(clip, 0, sizeof(*clip));
src/mesa/drivers/dri/i965/brw_sf_state.c
-89
View File
@@ -40,95 +40,6 @@
#include "brw_state.h"
#include "brw_defines.h"
static void upload_sf_vp(struct brw_context *brw)
{
struct gl_context *ctx = &brw->ctx;
struct brw_sf_viewport *sfv;
GLfloat y_scale, y_bias;
float scale[3], translate[3];
const bool render_to_fbo = _mesa_is_user_fbo(ctx->DrawBuffer);
sfv = brw_state_batch(brw, sizeof(*sfv), 32, &brw->sf.vp_offset);
memset(sfv, 0, sizeof(*sfv));
/* Accessing the fields Width and Height of gl_framebuffer to produce the
* values to program the viewport and scissor is fine as long as the
* gl_framebuffer has atleast one attachment.
*/
assert(ctx->DrawBuffer->_HasAttachments);
if (render_to_fbo) {
y_scale = 1.0;
y_bias = 0;
}
else {
y_scale = -1.0;
y_bias = ctx->DrawBuffer->Height;
}
/* _NEW_VIEWPORT */
_mesa_get_viewport_xform(ctx, 0, scale, translate);
sfv->viewport.m00 = scale[0];
sfv->viewport.m11 = scale[1] * y_scale;
sfv->viewport.m22 = scale[2];
sfv->viewport.m30 = translate[0];
sfv->viewport.m31 = translate[1] * y_scale + y_bias;
sfv->viewport.m32 = translate[2];
/* _NEW_SCISSOR | _NEW_BUFFERS | _NEW_VIEWPORT
* for DrawBuffer->_[XY]{min,max}
*/
/* The scissor only needs to handle the intersection of drawable
* and scissor rect, since there are no longer cliprects for shared
* buffers with DRI2.
*
* Note that the hardware's coordinates are inclusive, while Mesa's min is
* inclusive but max is exclusive.
*/
if (ctx->DrawBuffer->_Xmin == ctx->DrawBuffer->_Xmax ||
ctx->DrawBuffer->_Ymin == ctx->DrawBuffer->_Ymax) {
/* If the scissor was out of bounds and got clamped to 0
* width/height at the bounds, the subtraction of 1 from
* maximums could produce a negative number and thus not clip
* anything. Instead, just provide a min > max scissor inside
* the bounds, which produces the expected no rendering.
*/
sfv->scissor.xmin = 1;
sfv->scissor.xmax = 0;
sfv->scissor.ymin = 1;
sfv->scissor.ymax = 0;
} else if (render_to_fbo) {
/* texmemory: Y=0=bottom */
sfv->scissor.xmin = ctx->DrawBuffer->_Xmin;
sfv->scissor.xmax = ctx->DrawBuffer->_Xmax - 1;
sfv->scissor.ymin = ctx->DrawBuffer->_Ymin;
sfv->scissor.ymax = ctx->DrawBuffer->_Ymax - 1;
}
else {
/* memory: Y=0=top */
sfv->scissor.xmin = ctx->DrawBuffer->_Xmin;
sfv->scissor.xmax = ctx->DrawBuffer->_Xmax - 1;
sfv->scissor.ymin = ctx->DrawBuffer->Height - ctx->DrawBuffer->_Ymax;
sfv->scissor.ymax = ctx->DrawBuffer->Height - ctx->DrawBuffer->_Ymin - 1;
}
brw->ctx.NewDriverState |= BRW_NEW_SF_VP;
}
const struct brw_tracked_state brw_sf_vp = {
.dirty = {
.mesa = _NEW_BUFFERS |
_NEW_SCISSOR |
_NEW_VIEWPORT,
.brw = BRW_NEW_BATCH |
BRW_NEW_BLORP,
},
.emit = upload_sf_vp
};
static void upload_sf_unit( struct brw_context *brw )
{
struct gl_context *ctx = &brw->ctx;
src/mesa/drivers/dri/i965/genX_state_upload.c
+9 -5
View File
@@ -2045,7 +2045,6 @@ static const struct brw_tracked_state genX(scissor_state) = {
/* ---------------------------------------------------------------------- */
#if GEN_GEN >= 6
static void
brw_calculate_guardband_size(uint32_t fb_width, uint32_t fb_height,
float m00, float m11, float m30, float m31,
@@ -2192,7 +2191,10 @@ genX(upload_sf_clip_viewport)(struct brw_context *brw)
clv.YMinClipGuardband = gb_ymin;
clv.YMaxClipGuardband = gb_ymax;
#if GEN_GEN >= 8
#if GEN_GEN < 6
set_scissor_bits(ctx, i, render_to_fbo, fb_width, fb_height,
&sfv.ScissorRectangle);
#elif GEN_GEN >= 8
/* _NEW_VIEWPORT | _NEW_BUFFERS: Screen Space Viewport
* The hardware will take the intersection of the drawing rectangle,
* scissor rectangle, and the viewport extents. We don't need to be
@@ -2239,6 +2241,8 @@ genX(upload_sf_clip_viewport)(struct brw_context *brw)
vp.PointertoSF_VIEWPORT = sf_vp_offset;
}
#else
brw->sf.vp_offset = sf_vp_offset;
brw->clip.vp_offset = clip_vp_offset;
brw->ctx.NewDriverState |= BRW_NEW_SF_VP | BRW_NEW_CLIP_VP;
#endif
}
@@ -2246,14 +2250,14 @@ genX(upload_sf_clip_viewport)(struct brw_context *brw)
static const struct brw_tracked_state genX(sf_clip_viewport) = {
.dirty = {
.mesa = _NEW_BUFFERS |
_NEW_VIEWPORT,
_NEW_VIEWPORT |
(GEN_GEN <= 5 ? _NEW_SCISSOR : 0),
.brw = BRW_NEW_BATCH |
BRW_NEW_BLORP |
BRW_NEW_VIEWPORT_COUNT,
},
.emit = genX(upload_sf_clip_viewport),
};
#endif
/* ---------------------------------------------------------------------- */
@@ -4174,7 +4178,7 @@ genX(init_atoms)(struct brw_context *brw)
/* These set up state for brw_psp_urb_cbs */
&brw_wm_unit,
&brw_sf_vp,
&genX(sf_clip_viewport),
&brw_sf_unit,
&genX(vs_state), /* always required, enabled or not */
&brw_clip_unit,