anv: Move invariant state to small initial batch
We use the simple batch helper to submit a batch at driver startup time which holds all the state that never changes. We don't have a whole lot and once we enable tesselation there'll be even less. Even so, it's a simple mechanism and reduces our steady state batch sizes a bit.
This commit is contained in:
+23
-4
@@ -673,8 +673,9 @@ anv_device_init_border_colors(struct anv_device *device)
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border_colors);
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}
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static VkResult
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submit_simple_batch(struct anv_device *device, struct anv_batch *batch)
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VkResult
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anv_device_submit_simple_batch(struct anv_device *device,
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struct anv_batch *batch)
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{
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struct anv_state state;
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struct drm_i915_gem_execbuffer2 execbuf;
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@@ -685,6 +686,7 @@ submit_simple_batch(struct anv_device *device, struct anv_batch *batch)
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int64_t timeout;
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int ret;
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/* Kernel driver requires 8 byte aligned batch length */
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size = align_u32(batch->next - batch->start, 8);
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state = anv_state_pool_alloc(&device->dynamic_state_pool, MAX(size, 64), 32);
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bo = &device->dynamic_state_pool.block_pool->bo;
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@@ -702,7 +704,7 @@ submit_simple_batch(struct anv_device *device, struct anv_batch *batch)
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execbuf.buffers_ptr = (uintptr_t) exec2_objects;
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execbuf.buffer_count = 1;
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execbuf.batch_start_offset = state.offset;
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execbuf.batch_len = batch->next - state.map;
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execbuf.batch_len = size;
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execbuf.cliprects_ptr = 0;
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execbuf.num_cliprects = 0;
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execbuf.DR1 = 0;
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@@ -814,6 +816,23 @@ VkResult anv_CreateDevice(
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anv_queue_init(device, &device->queue);
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switch (device->info.gen) {
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case 7:
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if (!device->info.is_haswell)
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result = gen7_init_device_state(device);
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else
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result = gen75_init_device_state(device);
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break;
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case 8:
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result = gen8_init_device_state(device);
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break;
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case 9:
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result = gen9_init_device_state(device);
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break;
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}
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if (result != VK_SUCCESS)
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goto fail_fd;
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result = anv_device_init_meta(device);
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if (result != VK_SUCCESS)
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goto fail_fd;
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@@ -1006,7 +1025,7 @@ VkResult anv_DeviceWaitIdle(
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anv_batch_emit(&batch, GEN7_MI_BATCH_BUFFER_END);
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anv_batch_emit(&batch, GEN7_MI_NOOP);
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return submit_simple_batch(device, &batch);
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return anv_device_submit_simple_batch(device, &batch);
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}
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VkResult
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@@ -662,6 +662,11 @@ struct anv_device {
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pthread_mutex_t mutex;
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};
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VkResult gen7_init_device_state(struct anv_device *device);
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VkResult gen75_init_device_state(struct anv_device *device);
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VkResult gen8_init_device_state(struct anv_device *device);
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VkResult gen9_init_device_state(struct anv_device *device);
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void* anv_gem_mmap(struct anv_device *device,
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uint32_t gem_handle, uint64_t offset, uint64_t size, uint32_t flags);
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void anv_gem_munmap(void *p, uint64_t size);
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@@ -738,6 +743,8 @@ void *anv_batch_emit_dwords(struct anv_batch *batch, int num_dwords);
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void anv_batch_emit_batch(struct anv_batch *batch, struct anv_batch *other);
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uint64_t anv_batch_emit_reloc(struct anv_batch *batch,
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void *location, struct anv_bo *bo, uint32_t offset);
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VkResult anv_device_submit_simple_batch(struct anv_device *device,
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struct anv_batch *batch);
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struct anv_address {
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struct anv_bo *bo;
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@@ -214,17 +214,8 @@ genX(graphics_pipeline_create)(
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gen7_emit_cb_state(pipeline, pCreateInfo->pColorBlendState,
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pCreateInfo->pMultisampleState);
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anv_batch_emit(&pipeline->batch, GEN7_3DSTATE_VF_STATISTICS,
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.StatisticsEnable = true);
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anv_batch_emit(&pipeline->batch, GEN7_3DSTATE_HS, .Enable = false);
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anv_batch_emit(&pipeline->batch, GEN7_3DSTATE_TE, .TEEnable = false);
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anv_batch_emit(&pipeline->batch, GEN7_3DSTATE_DS, .DSFunctionEnable = false);
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anv_batch_emit(&pipeline->batch, GEN7_3DSTATE_STREAMOUT, .SOFunctionEnable = false);
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emit_urb_setup(pipeline);
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anv_batch_emit(&pipeline->batch, GEN7_3DSTATE_AA_LINE_PARAMETERS);
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const VkPipelineRasterizationStateCreateInfo *rs_info =
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pCreateInfo->pRasterizationState;
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@@ -34,6 +34,32 @@
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#include "genX_state_util.h"
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VkResult
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genX(init_device_state)(struct anv_device *device)
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{
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struct anv_batch batch;
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uint32_t cmds[64];
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batch.start = batch.next = cmds;
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batch.end = (void *) cmds + sizeof(cmds);
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anv_batch_emit(&batch, GEN7_PIPELINE_SELECT,
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.PipelineSelection = GPGPU);
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anv_batch_emit(&batch, GENX(3DSTATE_VF_STATISTICS),
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.StatisticsEnable = true);
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anv_batch_emit(&batch, GENX(3DSTATE_HS), .Enable = false);
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anv_batch_emit(&batch, GENX(3DSTATE_TE), .TEEnable = false);
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anv_batch_emit(&batch, GENX(3DSTATE_DS), .DSFunctionEnable = false);
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anv_batch_emit(&batch, GENX(3DSTATE_STREAMOUT), .SOFunctionEnable = false);
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anv_batch_emit(&batch, GEN7_3DSTATE_AA_LINE_PARAMETERS);
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anv_batch_emit(&batch, GENX(MI_BATCH_BUFFER_END));
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assert(batch.next <= batch.end);
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return anv_device_submit_simple_batch(device, &batch);
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}
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GENX_FUNC(GEN7, GEN75) void
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genX(fill_buffer_surface_state)(void *state, enum isl_format format,
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uint32_t offset, uint32_t range,
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@@ -247,76 +247,6 @@ emit_ms_state(struct anv_pipeline *pipeline,
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anv_batch_emit(&pipeline->batch, GENX(3DSTATE_SAMPLE_MASK),
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.SampleMask = sample_mask);
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/* See the Vulkan 1.0 spec Table 24.1 "Standard sample locations" and
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* VkPhysicalDeviceFeatures::standardSampleLocations.
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*/
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anv_batch_emit(&pipeline->batch, GENX(3DSTATE_SAMPLE_PATTERN),
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._1xSample0XOffset = 0.5,
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._1xSample0YOffset = 0.5,
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._2xSample0XOffset = 0.25,
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._2xSample0YOffset = 0.25,
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._2xSample1XOffset = 0.75,
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._2xSample1YOffset = 0.75,
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._4xSample0XOffset = 0.375,
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._4xSample0YOffset = 0.125,
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._4xSample1XOffset = 0.875,
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._4xSample1YOffset = 0.375,
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._4xSample2XOffset = 0.125,
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._4xSample2YOffset = 0.625,
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._4xSample3XOffset = 0.625,
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._4xSample3YOffset = 0.875,
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._8xSample0XOffset = 0.5625,
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._8xSample0YOffset = 0.3125,
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._8xSample1XOffset = 0.4375,
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._8xSample1YOffset = 0.6875,
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._8xSample2XOffset = 0.8125,
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._8xSample2YOffset = 0.5625,
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._8xSample3XOffset = 0.3125,
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._8xSample3YOffset = 0.1875,
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._8xSample4XOffset = 0.1875,
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._8xSample4YOffset = 0.8125,
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._8xSample5XOffset = 0.0625,
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._8xSample5YOffset = 0.4375,
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._8xSample6XOffset = 0.6875,
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._8xSample6YOffset = 0.9375,
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._8xSample7XOffset = 0.9375,
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._8xSample7YOffset = 0.0625,
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#if ANV_GEN >= 9
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._16xSample0XOffset = 0.5625,
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._16xSample0YOffset = 0.5625,
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._16xSample1XOffset = 0.4375,
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._16xSample1YOffset = 0.3125,
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._16xSample2XOffset = 0.3125,
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._16xSample2YOffset = 0.6250,
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._16xSample3XOffset = 0.7500,
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._16xSample3YOffset = 0.4375,
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._16xSample4XOffset = 0.1875,
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._16xSample4YOffset = 0.3750,
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._16xSample5XOffset = 0.6250,
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._16xSample5YOffset = 0.8125,
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._16xSample6XOffset = 0.8125,
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._16xSample6YOffset = 0.6875,
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._16xSample7XOffset = 0.6875,
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._16xSample7YOffset = 0.1875,
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._16xSample8XOffset = 0.3750,
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._16xSample8YOffset = 0.8750,
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._16xSample9XOffset = 0.5000,
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._16xSample9YOffset = 0.0625,
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._16xSample10XOffset = 0.2500,
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._16xSample10YOffset = 0.1250,
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._16xSample11XOffset = 0.1250,
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._16xSample11YOffset = 0.7500,
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._16xSample12XOffset = 0.0000,
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._16xSample12YOffset = 0.5000,
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._16xSample13XOffset = 0.9375,
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._16xSample13YOffset = 0.2500,
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._16xSample14XOffset = 0.8750,
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._16xSample14YOffset = 0.9375,
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._16xSample15XOffset = 0.0625,
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._16xSample15YOffset = 0.0000,
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#endif
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);
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}
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VkResult
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@@ -359,19 +289,8 @@ genX(graphics_pipeline_create)(
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emit_cb_state(pipeline, pCreateInfo->pColorBlendState,
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pCreateInfo->pMultisampleState);
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anv_batch_emit(&pipeline->batch, GENX(3DSTATE_VF_STATISTICS),
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.StatisticsEnable = true);
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anv_batch_emit(&pipeline->batch, GENX(3DSTATE_HS), .Enable = false);
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anv_batch_emit(&pipeline->batch, GENX(3DSTATE_TE), .TEEnable = false);
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anv_batch_emit(&pipeline->batch, GENX(3DSTATE_DS), .FunctionEnable = false);
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anv_batch_emit(&pipeline->batch, GENX(3DSTATE_STREAMOUT), .SOFunctionEnable = false);
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emit_urb_setup(pipeline);
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anv_batch_emit(&pipeline->batch, GENX(3DSTATE_WM_CHROMAKEY),
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.ChromaKeyKillEnable = false);
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anv_batch_emit(&pipeline->batch, GENX(3DSTATE_AA_LINE_PARAMETERS));
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anv_batch_emit(&pipeline->batch, GENX(3DSTATE_CLIP),
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.ClipEnable = true,
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.ViewportXYClipTestEnable = !(extra && extra->disable_viewport),
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@@ -34,6 +34,108 @@
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#include "genX_state_util.h"
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VkResult
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genX(init_device_state)(struct anv_device *device)
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{
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struct anv_batch batch;
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uint32_t cmds[64];
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batch.start = batch.next = cmds;
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batch.end = (void *) cmds + sizeof(cmds);
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anv_batch_emit(&batch, GENX(PIPELINE_SELECT),
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#if ANV_GEN >= 9
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.MaskBits = 3,
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#endif
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.PipelineSelection = _3D);
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anv_batch_emit(&batch, GENX(3DSTATE_VF_STATISTICS),
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.StatisticsEnable = true);
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anv_batch_emit(&batch, GENX(3DSTATE_HS), .Enable = false);
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anv_batch_emit(&batch, GENX(3DSTATE_TE), .TEEnable = false);
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anv_batch_emit(&batch, GENX(3DSTATE_DS), .FunctionEnable = false);
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anv_batch_emit(&batch, GENX(3DSTATE_STREAMOUT), .SOFunctionEnable = false);
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anv_batch_emit(&batch, GENX(3DSTATE_WM_CHROMAKEY),
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.ChromaKeyKillEnable = false);
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anv_batch_emit(&batch, GENX(3DSTATE_AA_LINE_PARAMETERS));
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/* See the Vulkan 1.0 spec Table 24.1 "Standard sample locations" and
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* VkPhysicalDeviceFeatures::standardSampleLocations.
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*/
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anv_batch_emit(&batch, GENX(3DSTATE_SAMPLE_PATTERN),
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._1xSample0XOffset = 0.5,
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._1xSample0YOffset = 0.5,
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._2xSample0XOffset = 0.25,
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._2xSample0YOffset = 0.25,
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._2xSample1XOffset = 0.75,
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._2xSample1YOffset = 0.75,
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._4xSample0XOffset = 0.375,
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._4xSample0YOffset = 0.125,
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._4xSample1XOffset = 0.875,
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._4xSample1YOffset = 0.375,
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._4xSample2XOffset = 0.125,
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._4xSample2YOffset = 0.625,
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._4xSample3XOffset = 0.625,
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._4xSample3YOffset = 0.875,
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._8xSample0XOffset = 0.5625,
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._8xSample0YOffset = 0.3125,
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._8xSample1XOffset = 0.4375,
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._8xSample1YOffset = 0.6875,
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._8xSample2XOffset = 0.8125,
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._8xSample2YOffset = 0.5625,
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._8xSample3XOffset = 0.3125,
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._8xSample3YOffset = 0.1875,
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._8xSample4XOffset = 0.1875,
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._8xSample4YOffset = 0.8125,
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._8xSample5XOffset = 0.0625,
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._8xSample5YOffset = 0.4375,
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._8xSample6XOffset = 0.6875,
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._8xSample6YOffset = 0.9375,
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._8xSample7XOffset = 0.9375,
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._8xSample7YOffset = 0.0625,
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#if ANV_GEN >= 9
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._16xSample0XOffset = 0.5625,
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._16xSample0YOffset = 0.5625,
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._16xSample1XOffset = 0.4375,
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._16xSample1YOffset = 0.3125,
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._16xSample2XOffset = 0.3125,
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._16xSample2YOffset = 0.6250,
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._16xSample3XOffset = 0.7500,
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._16xSample3YOffset = 0.4375,
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._16xSample4XOffset = 0.1875,
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._16xSample4YOffset = 0.3750,
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._16xSample5XOffset = 0.6250,
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._16xSample5YOffset = 0.8125,
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._16xSample6XOffset = 0.8125,
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._16xSample6YOffset = 0.6875,
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._16xSample7XOffset = 0.6875,
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._16xSample7YOffset = 0.1875,
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._16xSample8XOffset = 0.3750,
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._16xSample8YOffset = 0.8750,
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._16xSample9XOffset = 0.5000,
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._16xSample9YOffset = 0.0625,
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._16xSample10XOffset = 0.2500,
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._16xSample10YOffset = 0.1250,
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._16xSample11XOffset = 0.1250,
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._16xSample11YOffset = 0.7500,
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._16xSample12XOffset = 0.0000,
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._16xSample12YOffset = 0.5000,
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._16xSample13XOffset = 0.9375,
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._16xSample13YOffset = 0.2500,
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._16xSample14XOffset = 0.8750,
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._16xSample14YOffset = 0.9375,
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._16xSample15XOffset = 0.0625,
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._16xSample15YOffset = 0.0000,
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#endif
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);
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anv_batch_emit(&batch, GENX(MI_BATCH_BUFFER_END));
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assert(batch.next <= batch.end);
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return anv_device_submit_simple_batch(device, &batch);
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}
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static const uint32_t
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isl_to_gen_multisample_layout[] = {
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[ISL_MSAA_LAYOUT_NONE] = MSS,
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