etnaviv: Remove isa.xml.h
We are using etnaviv.xml to describe our isa and generated all the needed files. Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28183>
This commit is contained in:
Christian Gmeiner
committed by
Marge Bot
Marge Bot
parent
846d4988ce
commit
6b1456ccdb
@@ -30,7 +30,6 @@
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#include <stdint.h>
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#include <stdbool.h>
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#include "util/u_math.h"
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#include "hw/isa.xml.h"
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#include <etnaviv/isa/asm.h>
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@@ -0,0 +1 @@
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isa.xml.h
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@@ -1,322 +0,0 @@
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#ifndef ISA_XML
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#define ISA_XML
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/* Autogenerated file, DO NOT EDIT manually!
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This file was generated by the rules-ng-ng headergen tool in this git repository:
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http://0x04.net/cgit/index.cgi/rules-ng-ng
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git clone git://0x04.net/rules-ng-ng
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The rules-ng-ng source files this header was generated from are:
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- isa.xml ( 39261 bytes, from 2024-01-19 15:52:43)
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- copyright.xml ( 1597 bytes, from 2022-05-20 05:37:53)
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Copyright (C) 2012-2024 by the following authors:
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- Wladimir J. van der Laan <laanwj@gmail.com>
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- Christian Gmeiner <christian.gmeiner@gmail.com>
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- Lucas Stach <l.stach@pengutronix.de>
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- Russell King <rmk@arm.linux.org.uk>
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sub license,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice (including the
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next paragraph) shall be included in all copies or substantial portions
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of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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DEALINGS IN THE SOFTWARE.
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*/
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#define INST_OPCODE_NOP 0x00000000
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#define INST_OPCODE_ADD 0x00000001
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#define INST_OPCODE_MAD 0x00000002
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#define INST_OPCODE_MUL 0x00000003
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#define INST_OPCODE_DST 0x00000004
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#define INST_OPCODE_DP3 0x00000005
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#define INST_OPCODE_DP4 0x00000006
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#define INST_OPCODE_DSX 0x00000007
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#define INST_OPCODE_DSY 0x00000008
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#define INST_OPCODE_MOV 0x00000009
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#define INST_OPCODE_MOVAR 0x0000000a
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#define INST_OPCODE_MOVAF 0x0000000b
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#define INST_OPCODE_RCP 0x0000000c
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#define INST_OPCODE_RSQ 0x0000000d
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#define INST_OPCODE_LITP 0x0000000e
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#define INST_OPCODE_SELECT 0x0000000f
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#define INST_OPCODE_SET 0x00000010
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#define INST_OPCODE_EXP 0x00000011
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#define INST_OPCODE_LOG 0x00000012
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#define INST_OPCODE_FRC 0x00000013
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#define INST_OPCODE_CALL 0x00000014
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#define INST_OPCODE_RET 0x00000015
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#define INST_OPCODE_BRANCH 0x00000016
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#define INST_OPCODE_TEXKILL 0x00000017
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#define INST_OPCODE_TEXLD 0x00000018
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#define INST_OPCODE_TEXLDB 0x00000019
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#define INST_OPCODE_TEXLDD 0x0000001a
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#define INST_OPCODE_TEXLDL 0x0000001b
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#define INST_OPCODE_TEXLDPCF 0x0000001c
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#define INST_OPCODE_REP 0x0000001d
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#define INST_OPCODE_ENDREP 0x0000001e
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#define INST_OPCODE_LOOP 0x0000001f
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#define INST_OPCODE_ENDLOOP 0x00000020
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#define INST_OPCODE_SQRT 0x00000021
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#define INST_OPCODE_SIN 0x00000022
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#define INST_OPCODE_COS 0x00000023
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#define INST_OPCODE_BRANCH2 0x00000024
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#define INST_OPCODE_FLOOR 0x00000025
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#define INST_OPCODE_CEIL 0x00000026
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#define INST_OPCODE_SIGN 0x00000027
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#define INST_OPCODE_ADDLO 0x00000028
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#define INST_OPCODE_MULLO 0x00000029
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#define INST_OPCODE_BARRIER 0x0000002a
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#define INST_OPCODE_SWIZZLE 0x0000002b
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#define INST_OPCODE_I2I 0x0000002c
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#define INST_OPCODE_I2F 0x0000002d
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#define INST_OPCODE_F2I 0x0000002e
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#define INST_OPCODE_F2IRND 0x0000002f
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#define INST_OPCODE_F2I7 0x00000030
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#define INST_OPCODE_CMP 0x00000031
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#define INST_OPCODE_LOAD 0x00000032
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#define INST_OPCODE_STORE 0x00000033
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#define INST_OPCODE_IMG_LOAD_3D 0x00000034
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#define INST_OPCODE_IMG_STORE_3D 0x00000035
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#define INST_OPCODE_GETMANT 0x00000036
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#define INST_OPCODE_NAN 0x00000037
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#define INST_OPCODE_NEXTAFTER 0x00000038
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#define INST_OPCODE_ROUNDEVEN 0x00000039
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#define INST_OPCODE_ROUNDAWAY 0x0000003a
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#define INST_OPCODE_IADDSAT 0x0000003b
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#define INST_OPCODE_IMULLO0 0x0000003c
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#define INST_OPCODE_IMULLO1 0x0000003d
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#define INST_OPCODE_IMULLOSAT0 0x0000003e
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#define INST_OPCODE_IMULLOSAT1 0x0000003f
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#define INST_OPCODE_IMULHI0 0x00000040
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#define INST_OPCODE_IMULHI1 0x00000041
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#define INST_OPCODE_IMUL0 0x00000042
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#define INST_OPCODE_IMUL1 0x00000043
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#define INST_OPCODE_IDIV0 0x00000044
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#define INST_OPCODE_IDIV1 0x00000045
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#define INST_OPCODE_IDIV2 0x00000046
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#define INST_OPCODE_IDIV3 0x00000047
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#define INST_OPCODE_IMOD0 0x00000048
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#define INST_OPCODE_TEXELFETCH 0x00000049
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#define INST_OPCODE_IMOD2 0x0000004a
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#define INST_OPCODE_IMOD3 0x0000004b
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#define INST_OPCODE_IMADLO0 0x0000004c
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#define INST_OPCODE_IMADLO1 0x0000004d
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#define INST_OPCODE_IMADLOSAT0 0x0000004e
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#define INST_OPCODE_IMADLOSAT1 0x0000004f
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#define INST_OPCODE_IMADHI0 0x00000050
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#define INST_OPCODE_IMADHI1 0x00000051
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#define INST_OPCODE_IMADHISAT0 0x00000052
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#define INST_OPCODE_IMADHISAT1 0x00000053
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#define INST_OPCODE_HALFADD 0x00000054
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#define INST_OPCODE_HALFADDINC 0x00000055
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#define INST_OPCODE_MOVAI 0x00000056
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#define INST_OPCODE_IABS 0x00000057
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#define INST_OPCODE_LEADZERO 0x00000058
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#define INST_OPCODE_LSHIFT 0x00000059
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#define INST_OPCODE_RSHIFT 0x0000005a
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#define INST_OPCODE_ROTATE 0x0000005b
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#define INST_OPCODE_OR 0x0000005c
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#define INST_OPCODE_AND 0x0000005d
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#define INST_OPCODE_XOR 0x0000005e
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#define INST_OPCODE_NOT 0x0000005f
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#define INST_OPCODE_BITSELECT 0x00000060
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#define INST_OPCODE_POPCOUNT 0x00000061
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#define INST_OPCODE_STOREB 0x00000062
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#define INST_OPCODE_RGB2YUV 0x00000063
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#define INST_OPCODE_DIV 0x00000064
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#define INST_OPCODE_ATOM_ADD 0x00000065
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#define INST_OPCODE_ATOM_XCHG 0x00000066
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#define INST_OPCODE_ATOM_CMP_XCHG 0x00000067
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#define INST_OPCODE_ATOM_MIN 0x00000068
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#define INST_OPCODE_ATOM_MAX 0x00000069
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#define INST_OPCODE_ATOM_OR 0x0000006a
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#define INST_OPCODE_ATOM_AND 0x0000006b
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#define INST_OPCODE_ATOM_XOR 0x0000006c
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#define INST_OPCODE_BIT_REV 0x0000006d
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#define INST_OPCODE_BYTE_REV 0x0000006e
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#define INST_OPCODE_TEXLDLPCF 0x0000006f
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#define INST_OPCODE_TEXLDGPCF 0x00000070
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#define INST_OPCODE_PACK 0x00000071
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#define INST_OPCODE_CONV 0x00000072
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#define INST_OPCODE_DP2 0x00000073
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#define INST_OPCODE_NORM_DP2 0x00000074
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#define INST_OPCODE_NORM_DP3 0x00000075
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#define INST_OPCODE_NORM_DP4 0x00000076
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#define INST_OPCODE_NORM_MUL 0x00000077
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#define INST_OPCODE_STORE_ATTR 0x00000078
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#define INST_OPCODE_IMG_LOAD 0x00000079
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#define INST_OPCODE_IMG_STORE 0x0000007a
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#define INST_OPCODE_RESTART 0x0000007b
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#define INST_OPCODE_NOP7C 0x0000007c
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#define INST_OPCODE_NOP7D 0x0000007d
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#define INST_OPCODE_NOP7E 0x0000007e
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#define INST_OPCODE_NOP7F 0x0000007f
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#define INST_CONDITION_TRUE 0x00000000
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#define INST_CONDITION_GT 0x00000001
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#define INST_CONDITION_LT 0x00000002
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#define INST_CONDITION_GE 0x00000003
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#define INST_CONDITION_LE 0x00000004
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#define INST_CONDITION_EQ 0x00000005
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#define INST_CONDITION_NE 0x00000006
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#define INST_CONDITION_AND 0x00000007
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#define INST_CONDITION_OR 0x00000008
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#define INST_CONDITION_XOR 0x00000009
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#define INST_CONDITION_NOT 0x0000000a
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#define INST_CONDITION_NZ 0x0000000b
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#define INST_CONDITION_GEZ 0x0000000c
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#define INST_CONDITION_GZ 0x0000000d
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#define INST_CONDITION_LEZ 0x0000000e
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#define INST_CONDITION_LZ 0x0000000f
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#define INST_RGROUP_TEMP 0x00000000
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#define INST_RGROUP_INTERNAL 0x00000001
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#define INST_RGROUP_UNIFORM_0 0x00000002
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#define INST_RGROUP_UNIFORM_1 0x00000003
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#define INST_RGROUP_TEMP_FP 0x00000004
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#define INST_RGROUP_IMMEDIATE 0x00000007
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#define INST_AMODE_DIRECT 0x00000000
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#define INST_AMODE_ADD_A_X 0x00000001
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#define INST_AMODE_ADD_A_Y 0x00000002
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#define INST_AMODE_ADD_A_Z 0x00000003
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#define INST_AMODE_ADD_A_W 0x00000004
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#define INST_SWIZ_COMP_X 0x00000000
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#define INST_SWIZ_COMP_Y 0x00000001
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#define INST_SWIZ_COMP_Z 0x00000002
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#define INST_SWIZ_COMP_W 0x00000003
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#define INST_TYPE_F32 0x00000000
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#define INST_TYPE_S32 0x00000001
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#define INST_TYPE_S8 0x00000002
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#define INST_TYPE_U16 0x00000003
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#define INST_TYPE_F16 0x00000004
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#define INST_TYPE_S16 0x00000005
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#define INST_TYPE_U32 0x00000006
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#define INST_TYPE_U8 0x00000007
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#define INST_ROUND_MODE_DEFAULT 0x00000000
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#define INST_ROUND_MODE_RTZ 0x00000001
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#define INST_ROUND_MODE_RTNE 0x00000002
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#define INST_COMPS_X 0x00000001
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#define INST_COMPS_Y 0x00000002
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#define INST_COMPS_Z 0x00000004
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#define INST_COMPS_W 0x00000008
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#define INST_SWIZ_X__MASK 0x00000003
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#define INST_SWIZ_X__SHIFT 0
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#define INST_SWIZ_X(x) (((x) << INST_SWIZ_X__SHIFT) & INST_SWIZ_X__MASK)
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#define INST_SWIZ_Y__MASK 0x0000000c
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#define INST_SWIZ_Y__SHIFT 2
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#define INST_SWIZ_Y(x) (((x) << INST_SWIZ_Y__SHIFT) & INST_SWIZ_Y__MASK)
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#define INST_SWIZ_Z__MASK 0x00000030
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#define INST_SWIZ_Z__SHIFT 4
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#define INST_SWIZ_Z(x) (((x) << INST_SWIZ_Z__SHIFT) & INST_SWIZ_Z__MASK)
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#define INST_SWIZ_W__MASK 0x000000c0
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#define INST_SWIZ_W__SHIFT 6
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#define INST_SWIZ_W(x) (((x) << INST_SWIZ_W__SHIFT) & INST_SWIZ_W__MASK)
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#define VIV_ISA_WORD_0 0x00000000
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#define VIV_ISA_WORD_0_OPCODE__MASK 0x0000003f
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#define VIV_ISA_WORD_0_OPCODE__SHIFT 0
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#define VIV_ISA_WORD_0_OPCODE(x) (((x) << VIV_ISA_WORD_0_OPCODE__SHIFT) & VIV_ISA_WORD_0_OPCODE__MASK)
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#define VIV_ISA_WORD_0_COND__MASK 0x000007c0
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#define VIV_ISA_WORD_0_COND__SHIFT 6
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#define VIV_ISA_WORD_0_COND(x) (((x) << VIV_ISA_WORD_0_COND__SHIFT) & VIV_ISA_WORD_0_COND__MASK)
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#define VIV_ISA_WORD_0_SAT 0x00000800
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#define VIV_ISA_WORD_0_DST_USE 0x00001000
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#define VIV_ISA_WORD_0_DST_AMODE__MASK 0x0000e000
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#define VIV_ISA_WORD_0_DST_AMODE__SHIFT 13
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#define VIV_ISA_WORD_0_DST_AMODE(x) (((x) << VIV_ISA_WORD_0_DST_AMODE__SHIFT) & VIV_ISA_WORD_0_DST_AMODE__MASK)
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#define VIV_ISA_WORD_0_DST_REG__MASK 0x007f0000
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#define VIV_ISA_WORD_0_DST_REG__SHIFT 16
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#define VIV_ISA_WORD_0_DST_REG(x) (((x) << VIV_ISA_WORD_0_DST_REG__SHIFT) & VIV_ISA_WORD_0_DST_REG__MASK)
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#define VIV_ISA_WORD_0_DST_COMPS__MASK 0x07800000
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#define VIV_ISA_WORD_0_DST_COMPS__SHIFT 23
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#define VIV_ISA_WORD_0_DST_COMPS(x) (((x) << VIV_ISA_WORD_0_DST_COMPS__SHIFT) & VIV_ISA_WORD_0_DST_COMPS__MASK)
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#define VIV_ISA_WORD_0_TEX_ID__MASK 0xf8000000
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#define VIV_ISA_WORD_0_TEX_ID__SHIFT 27
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#define VIV_ISA_WORD_0_TEX_ID(x) (((x) << VIV_ISA_WORD_0_TEX_ID__SHIFT) & VIV_ISA_WORD_0_TEX_ID__MASK)
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#define VIV_ISA_WORD_1 0x00000004
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#define VIV_ISA_WORD_1_TEX_AMODE__MASK 0x00000007
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#define VIV_ISA_WORD_1_TEX_AMODE__SHIFT 0
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#define VIV_ISA_WORD_1_TEX_AMODE(x) (((x) << VIV_ISA_WORD_1_TEX_AMODE__SHIFT) & VIV_ISA_WORD_1_TEX_AMODE__MASK)
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#define VIV_ISA_WORD_1_RMODE__MASK 0x00000003
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#define VIV_ISA_WORD_1_RMODE__SHIFT 0
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#define VIV_ISA_WORD_1_RMODE(x) (((x) << VIV_ISA_WORD_1_RMODE__SHIFT) & VIV_ISA_WORD_1_RMODE__MASK)
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#define VIV_ISA_WORD_1_PMODE 0x00000004
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#define VIV_ISA_WORD_1_TEX_SWIZ__MASK 0x000007f8
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#define VIV_ISA_WORD_1_TEX_SWIZ__SHIFT 3
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#define VIV_ISA_WORD_1_TEX_SWIZ(x) (((x) << VIV_ISA_WORD_1_TEX_SWIZ__SHIFT) & VIV_ISA_WORD_1_TEX_SWIZ__MASK)
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#define VIV_ISA_WORD_1_SRC0_USE 0x00000800
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#define VIV_ISA_WORD_1_SRC0_REG__MASK 0x001ff000
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#define VIV_ISA_WORD_1_SRC0_REG__SHIFT 12
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#define VIV_ISA_WORD_1_SRC0_REG(x) (((x) << VIV_ISA_WORD_1_SRC0_REG__SHIFT) & VIV_ISA_WORD_1_SRC0_REG__MASK)
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#define VIV_ISA_WORD_1_TYPE_BIT2 0x00200000
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#define VIV_ISA_WORD_1_SRC0_SWIZ__MASK 0x3fc00000
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#define VIV_ISA_WORD_1_SRC0_SWIZ__SHIFT 22
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#define VIV_ISA_WORD_1_SRC0_SWIZ(x) (((x) << VIV_ISA_WORD_1_SRC0_SWIZ__SHIFT) & VIV_ISA_WORD_1_SRC0_SWIZ__MASK)
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#define VIV_ISA_WORD_1_SRC0_NEG 0x40000000
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#define VIV_ISA_WORD_1_SRC0_ABS 0x80000000
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#define VIV_ISA_WORD_2 0x00000008
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#define VIV_ISA_WORD_2_SRC0_AMODE__MASK 0x00000007
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#define VIV_ISA_WORD_2_SRC0_AMODE__SHIFT 0
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#define VIV_ISA_WORD_2_SRC0_AMODE(x) (((x) << VIV_ISA_WORD_2_SRC0_AMODE__SHIFT) & VIV_ISA_WORD_2_SRC0_AMODE__MASK)
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#define VIV_ISA_WORD_2_SRC0_RGROUP__MASK 0x00000038
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#define VIV_ISA_WORD_2_SRC0_RGROUP__SHIFT 3
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#define VIV_ISA_WORD_2_SRC0_RGROUP(x) (((x) << VIV_ISA_WORD_2_SRC0_RGROUP__SHIFT) & VIV_ISA_WORD_2_SRC0_RGROUP__MASK)
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#define VIV_ISA_WORD_2_SRC1_USE 0x00000040
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#define VIV_ISA_WORD_2_SRC1_REG__MASK 0x0000ff80
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#define VIV_ISA_WORD_2_SRC1_REG__SHIFT 7
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#define VIV_ISA_WORD_2_SRC1_REG(x) (((x) << VIV_ISA_WORD_2_SRC1_REG__SHIFT) & VIV_ISA_WORD_2_SRC1_REG__MASK)
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#define VIV_ISA_WORD_2_OPCODE_BIT6 0x00010000
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#define VIV_ISA_WORD_2_SRC1_SWIZ__MASK 0x01fe0000
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#define VIV_ISA_WORD_2_SRC1_SWIZ__SHIFT 17
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#define VIV_ISA_WORD_2_SRC1_SWIZ(x) (((x) << VIV_ISA_WORD_2_SRC1_SWIZ__SHIFT) & VIV_ISA_WORD_2_SRC1_SWIZ__MASK)
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#define VIV_ISA_WORD_2_SRC1_NEG 0x02000000
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#define VIV_ISA_WORD_2_SRC1_ABS 0x04000000
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#define VIV_ISA_WORD_2_SRC1_AMODE__MASK 0x38000000
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#define VIV_ISA_WORD_2_SRC1_AMODE__SHIFT 27
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#define VIV_ISA_WORD_2_SRC1_AMODE(x) (((x) << VIV_ISA_WORD_2_SRC1_AMODE__SHIFT) & VIV_ISA_WORD_2_SRC1_AMODE__MASK)
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#define VIV_ISA_WORD_2_TYPE_BIT01__MASK 0xc0000000
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#define VIV_ISA_WORD_2_TYPE_BIT01__SHIFT 30
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#define VIV_ISA_WORD_2_TYPE_BIT01(x) (((x) << VIV_ISA_WORD_2_TYPE_BIT01__SHIFT) & VIV_ISA_WORD_2_TYPE_BIT01__MASK)
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#define VIV_ISA_WORD_3 0x0000000c
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#define VIV_ISA_WORD_3_SRC1_RGROUP__MASK 0x00000007
|
||||
#define VIV_ISA_WORD_3_SRC1_RGROUP__SHIFT 0
|
||||
#define VIV_ISA_WORD_3_SRC1_RGROUP(x) (((x) << VIV_ISA_WORD_3_SRC1_RGROUP__SHIFT) & VIV_ISA_WORD_3_SRC1_RGROUP__MASK)
|
||||
#define VIV_ISA_WORD_3_SRC2_IMM__MASK 0x003fff80
|
||||
#define VIV_ISA_WORD_3_SRC2_IMM__SHIFT 7
|
||||
#define VIV_ISA_WORD_3_SRC2_IMM(x) (((x) << VIV_ISA_WORD_3_SRC2_IMM__SHIFT) & VIV_ISA_WORD_3_SRC2_IMM__MASK)
|
||||
#define VIV_ISA_WORD_3_SRC2_USE 0x00000008
|
||||
#define VIV_ISA_WORD_3_SRC2_REG__MASK 0x00001ff0
|
||||
#define VIV_ISA_WORD_3_SRC2_REG__SHIFT 4
|
||||
#define VIV_ISA_WORD_3_SRC2_REG(x) (((x) << VIV_ISA_WORD_3_SRC2_REG__SHIFT) & VIV_ISA_WORD_3_SRC2_REG__MASK)
|
||||
#define VIV_ISA_WORD_3_SEL_BIT0 0x00002000
|
||||
#define VIV_ISA_WORD_3_SRC2_SWIZ__MASK 0x003fc000
|
||||
#define VIV_ISA_WORD_3_SRC2_SWIZ__SHIFT 14
|
||||
#define VIV_ISA_WORD_3_SRC2_SWIZ(x) (((x) << VIV_ISA_WORD_3_SRC2_SWIZ__SHIFT) & VIV_ISA_WORD_3_SRC2_SWIZ__MASK)
|
||||
#define VIV_ISA_WORD_3_SRC2_NEG 0x00400000
|
||||
#define VIV_ISA_WORD_3_SRC2_ABS 0x00800000
|
||||
#define VIV_ISA_WORD_3_SEL_BIT1 0x01000000
|
||||
#define VIV_ISA_WORD_3_SRC2_AMODE__MASK 0x0e000000
|
||||
#define VIV_ISA_WORD_3_SRC2_AMODE__SHIFT 25
|
||||
#define VIV_ISA_WORD_3_SRC2_AMODE(x) (((x) << VIV_ISA_WORD_3_SRC2_AMODE__SHIFT) & VIV_ISA_WORD_3_SRC2_AMODE__MASK)
|
||||
#define VIV_ISA_WORD_3_SRC2_RGROUP__MASK 0x70000000
|
||||
#define VIV_ISA_WORD_3_SRC2_RGROUP__SHIFT 28
|
||||
#define VIV_ISA_WORD_3_SRC2_RGROUP(x) (((x) << VIV_ISA_WORD_3_SRC2_RGROUP__SHIFT) & VIV_ISA_WORD_3_SRC2_RGROUP__MASK)
|
||||
#define VIV_ISA_WORD_3_DST_FULL 0x80000000
|
||||
|
||||
|
||||
#endif /* ISA_XML */
|
||||
@@ -22,7 +22,6 @@ files_etnaviv = files(
|
||||
'hw/cmdstream.xml.h',
|
||||
'hw/common.xml.h',
|
||||
'hw/common_3d.xml.h',
|
||||
'hw/isa.xml.h',
|
||||
'hw/state_3d.xml.h',
|
||||
'hw/state_blt.xml.h',
|
||||
'hw/state.xml.h',
|
||||
|
||||
Reference in New Issue
Block a user