r600/sfn: remove old code to track uniforms as it is no longer needed

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6879>
This commit is contained in:
Gert Wollny
2020-09-27 16:40:55 +02:00
committed by Marge Bot
parent 31e42fb780
commit 6aa196b673
6 changed files with 0 additions and 53 deletions
@@ -109,16 +109,6 @@ GPRVector EmitInstruction::vec_from_nir_with_fetch_constant(const nir_src& src,
return m_proc.vec_from_nir_with_fetch_constant(src, mask, swizzle, match);
}
void EmitInstruction::add_uniform(unsigned index, const PValue &value)
{
m_proc.add_uniform(index, value);
}
void EmitInstruction::load_uniform(const nir_alu_src& src)
{
m_proc.load_uniform(src);
}
int EmitInstruction::lookup_register_index(const nir_src& src) const
{
return m_proc.lookup_register_index(src);
@@ -79,8 +79,6 @@ protected:
GPRVector vec_from_nir_with_fetch_constant(const nir_src& src, unsigned mask,
const GPRVector::Swizzle& swizzle, bool match = false);
void add_uniform(unsigned index, const PValue &value);
void load_uniform(const nir_alu_src& src);
const nir_variable *get_deref_location(const nir_src& v) const;
enum chip_class get_chip_class(void) const;
@@ -921,9 +921,6 @@ bool ShaderFromNirProcessor::emit_load_ubo_vec4(nir_intrinsic_instr* instr)
ir->set_dest_swizzle(swz);
emit_instruction(ir);
for (int i = 0; i < instr->num_components ; ++i) {
add_uniform((instr->dest.ssa.index << 2) + i, trgt.reg_i(i));
}
m_sh_info.indirect_files |= 1 << TGSI_FILE_CONSTANT;
return true;
}
@@ -1111,30 +1108,6 @@ bool ShaderFromNirProcessor::emit_deref_instruction(nir_deref_instr* instr)
return false;
}
void ShaderFromNirProcessor::load_uniform(const nir_alu_src &src)
{
AluInstruction *ir = nullptr;
PValue sv[4];
assert(src.src.is_ssa);
for (int i = 0; i < src.src.ssa->num_components ; ++i) {
unsigned uindex = (src.src.ssa->index << 2) + i;
sv[i] = uniform(uindex);
assert(sv[i]);
}
for (int i = 0; i < src.src.ssa->num_components ; ++i) {
ir = new AluInstruction(op1_mov, create_register_from_nir_src(src.src, i), sv[i],
EmitInstruction::write);
emit_instruction(ir);
}
if (ir)
ir->set_flag(alu_last_instr);
}
bool ShaderFromNirProcessor::emit_instruction(EAluOp opcode, PValue dest,
std::vector<PValue> srcs,
const std::set<AluModifiers>& m_flags)
@@ -74,8 +74,6 @@ public:
void emit_instruction(AluInstruction *ir);
void split_constants(nir_alu_instr* instr);
void load_uniform(const nir_alu_src& src);
void remap_registers();
const nir_variable *get_deref_location(const nir_src& src) const;
@@ -128,11 +128,6 @@ PValue ValuePool::from_nir(const nir_src& v, unsigned component, unsigned swizzl
}
}
unsigned uindex = (index << 2) + swizzled;
auto u = m_uniforms.find(uindex);
if (u != m_uniforms.end())
return u->second;
return PValue();
}
@@ -159,11 +159,6 @@ public:
*/
bool create_undef(nir_ssa_undef_instr* instr);
void add_uniform(unsigned index, const PValue &value);
PValue uniform(unsigned index);
/** Create a new register with the given index and store it in the
* lookup map
*/
@@ -225,8 +220,6 @@ private:
std::map<unsigned, unsigned> m_local_register_map;
std::map<unsigned, unsigned> m_ssa_register_map;
std::map<unsigned, PValue> m_uniforms;
std::map<unsigned, PValue> m_registers;
static PValue m_undef;