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r600: enable sampler lod* bits

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bits, settings derived from testing, might contain some errors...
This commit is contained in:
Andre Maasikas
2010-01-22 16:55:47 +02:00
parent 70ccca4251
commit 69e26a08c6
1 changed files with 26 additions and 10 deletions
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src/mesa/drivers/dri/r600/r600_texstate.c
+26 -10
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@@ -651,6 +651,12 @@ static GLuint r600_translate_shadow_func(GLenum func)
}
}
static INLINE uint32_t
S_FIXED(float value, uint32_t frac_bits)
{
return value * (1 << frac_bits);
}
void r600SetDepthTexMode(struct gl_texture_object *tObj)
{
radeonTexObjPtr t;
@@ -670,8 +676,9 @@ void r600SetDepthTexMode(struct gl_texture_object *tObj)
* \param rmesa Context pointer
* \param t the r300 texture object
*/
static void setup_hardware_state(context_t *rmesa, struct gl_texture_object *texObj)
static void setup_hardware_state(GLcontext * ctx, struct gl_texture_object *texObj, int unit)
{
context_t *rmesa = R700_CONTEXT(ctx);
radeonTexObj *t = radeon_tex_obj(texObj);
const struct gl_texture_image *firstImage;
GLuint uTexelPitch, row_align;
@@ -733,11 +740,21 @@ static void setup_hardware_state(context_t *rmesa, struct gl_texture_object *tex
t->SQ_TEX_RESOURCE2 = get_base_teximage_offset(t) / 256;
if ((t->maxLod - t->minLod) > 0) {
t->SQ_TEX_RESOURCE3 = radeon_miptree_image_offset(t->mt, 0, t->minLod + 1) / 256;
SETfield(t->SQ_TEX_RESOURCE4, 0, BASE_LEVEL_shift, BASE_LEVEL_mask);
SETfield(t->SQ_TEX_RESOURCE5, t->maxLod - t->minLod, LAST_LEVEL_shift, LAST_LEVEL_mask);
}
t->SQ_TEX_RESOURCE3 = radeon_miptree_image_offset(t->mt, 0, t->minLod + 1) / 256;
SETfield(t->SQ_TEX_RESOURCE4, 0, BASE_LEVEL_shift, BASE_LEVEL_mask);
SETfield(t->SQ_TEX_RESOURCE5, t->maxLod - t->minLod, LAST_LEVEL_shift, LAST_LEVEL_mask);
SETfield(t->SQ_TEX_SAMPLER1,
S_FIXED(CLAMP(t->base.MinLod - t->minLod, 0, 15), 6),
MIN_LOD_shift, MIN_LOD_mask);
SETfield(t->SQ_TEX_SAMPLER1,
S_FIXED(CLAMP(t->base.MaxLod - t->minLod, 0, 15), 6),
MAX_LOD_shift, MAX_LOD_mask);
SETfield(t->SQ_TEX_SAMPLER1,
S_FIXED(CLAMP(ctx->Texture.Unit[unit].LodBias + t->base.LodBias, -16, 16), 6),
SQ_TEX_SAMPLER_WORD1_0__LOD_BIAS_shift, SQ_TEX_SAMPLER_WORD1_0__LOD_BIAS_mask);
if(texObj->CompareMode == GL_COMPARE_R_TO_TEXTURE_ARB)
{
SETfield(t->SQ_TEX_SAMPLER0, r600_translate_shadow_func(texObj->CompareFunc), DEPTH_COMPARE_FUNCTION_shift, DEPTH_COMPARE_FUNCTION_mask);
@@ -754,9 +771,8 @@ static void setup_hardware_state(context_t *rmesa, struct gl_texture_object *tex
*
* Mostly this means populating the texture object's mipmap tree.
*/
static GLboolean r600_validate_texture(GLcontext * ctx, struct gl_texture_object *texObj)
static GLboolean r600_validate_texture(GLcontext * ctx, struct gl_texture_object *texObj, int unit)
{
context_t *rmesa = R700_CONTEXT(ctx);
radeonTexObj *t = radeon_tex_obj(texObj);
if (!radeon_validate_texture_miptree(ctx, texObj))
@@ -764,7 +780,7 @@ static GLboolean r600_validate_texture(GLcontext * ctx, struct gl_texture_object
/* Configure the hardware registers (more precisely, the cached version
* of the hardware registers). */
setup_hardware_state(rmesa, texObj);
setup_hardware_state(ctx, texObj, unit);
t->validated = GL_TRUE;
return GL_TRUE;
@@ -805,7 +821,7 @@ GLboolean r600ValidateBuffers(GLcontext * ctx)
if (!ctx->Texture.Unit[i]._ReallyEnabled)
continue;
if (!r600_validate_texture(ctx, ctx->Texture.Unit[i]._Current)) {
if (!r600_validate_texture(ctx, ctx->Texture.Unit[i]._Current, i)) {
radeon_warning("failed to validate texture for unit %d.\n", i);
}
t = radeon_tex_obj(ctx->Texture.Unit[i]._Current);