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radv: use the ES type to apply a workaround for NGG on GFX10

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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22095>
This commit is contained in:
Samuel Pitoiset
2023-03-24 08:23:24 +01:00
committed by Marge Bot
parent 73ac2a22ec
commit 69da185793
1 changed files with 2 additions and 2 deletions
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src/amd/vulkan/radv_pipeline.c
+2 -2
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@@ -3876,8 +3876,8 @@ radv_pipeline_emit_hw_ngg(const struct radv_device *device, struct radeon_cmdbuf
*
* Requirement: GE_CNTL.VERT_GRP_SIZE = VGT_GS_ONCHIP_CNTL.ES_VERTS_PER_SUBGRP - 5
*/
if (pdevice->rad_info.gfx_level == GFX10 &&
!radv_pipeline_has_stage(pipeline, MESA_SHADER_TESS_CTRL) && ngg_state->hw_max_esverts != 256) {
if (pdevice->rad_info.gfx_level == GFX10 && es_type != MESA_SHADER_TESS_EVAL &&
ngg_state->hw_max_esverts != 256) {
ge_cntl &= C_03096C_VERT_GRP_SIZE;
if (ngg_state->hw_max_esverts > 5) {