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intel/genxml: turn SLM Enable bit into boolean

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Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
This commit is contained in:
Lionel Landwerlin
2018-09-07 11:55:45 +01:00
parent 97fcccb25e
commit 69874e9a6a
3 changed files with 3 additions and 3 deletions
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src/intel/genxml/gen10.xml
+1 -1
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@@ -3546,7 +3546,7 @@
</register>
<register name="L3CNTLREG" length="1" num="0x7034">
<field name="SLM Enable" start="0" end="0" type="uint"/>
<field name="SLM Enable" start="0" end="0" type="bool"/>
<field name="URB Allocation" start="1" end="7" type="uint"/>
<field name="RO Allocation" start="11" end="17" type="uint"/>
<field name="DC Allocation" start="18" end="24" type="uint"/>
src/intel/genxml/gen8.xml
+1 -1
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@@ -3199,7 +3199,7 @@
</register>
<register name="L3CNTLREG" length="1" num="0x7034">
<field name="SLM Enable" start="0" end="0" type="uint"/>
<field name="SLM Enable" start="0" end="0" type="bool"/>
<field name="URB Allocation" start="1" end="7" type="uint"/>
<field name="RO Allocation" start="11" end="17" type="uint"/>
<field name="DC Allocation" start="18" end="24" type="uint"/>
src/intel/genxml/gen9.xml
+1 -1
View File
@@ -3484,7 +3484,7 @@
</register>
<register name="L3CNTLREG" length="1" num="0x7034">
<field name="SLM Enable" start="0" end="0" type="uint"/>
<field name="SLM Enable" start="0" end="0" type="bool"/>
<field name="URB Allocation" start="1" end="7" type="uint"/>
<field name="RO Allocation" start="11" end="17" type="uint"/>
<field name="DC Allocation" start="18" end="24" type="uint"/>