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nvc0: reduce the number of GPR used when reading MP perf counters

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No need to allocate more GPR than used in the compute kernel which
reads MP performance counters on Fermi.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
This commit is contained in:
Samuel Pitoiset
2015-11-14 17:20:09 +01:00
parent f94e1d9738
commit 69271bba06
1 changed files with 2 additions and 1 deletions
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src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c
+2 -1
View File
@@ -1014,14 +1014,15 @@ nvc0_hw_sm_end_query(struct nvc0_context *nvc0, struct nvc0_hw_query *hq)
struct nvc0_program *prog = CALLOC_STRUCT(nvc0_program);
prog->type = PIPE_SHADER_COMPUTE;
prog->translated = true;
prog->num_gprs = 14;
prog->parm_size = 12;
if (is_nve4) {
prog->code = (uint32_t *)nve4_read_hw_sm_counters_code;
prog->code_size = sizeof(nve4_read_hw_sm_counters_code);
prog->num_gprs = 14;
} else {
prog->code = (uint32_t *)nvc0_read_hw_sm_counters_code;
prog->code_size = sizeof(nvc0_read_hw_sm_counters_code);
prog->num_gprs = 12;
}
screen->pm.prog = prog;
}