r300: Removed the radeon_vertex_buffer structure.

This commit is contained in:
Tommy Schultz Lassen
2007-05-17 14:11:23 +00:00
committed by Oliver McFadden
parent bb372f1c9b
commit 67f82731fc
3 changed files with 56 additions and 190 deletions
-23
View File
@@ -790,28 +790,6 @@ struct r300_fragment_program {
#define REG_COLOR0 1
#define REG_TEX0 2
struct dt {
GLint size;
GLenum type;
GLsizei stride;
void *data;
};
struct radeon_vertex_buffer {
int Count;
void *Elts;
int elt_size;
int elt_min, elt_max; /* debug */
struct dt AttribPtr[VERT_ATTRIB_MAX];
const struct _mesa_prim *Primitive;
GLuint PrimitiveCount;
GLint LockFirst;
GLsizei LockCount;
int lock_uptodate;
};
struct r300_state {
struct r300_depthbuffer_state depth;
struct r300_texture_state texture;
@@ -820,7 +798,6 @@ struct r300_state {
struct r300_pfs_compile_state pfs_compile;
struct r300_dma_region aos[R300_MAX_AOS_ARRAYS];
int aos_count;
struct radeon_vertex_buffer VB;
GLuint *Elts;
struct r300_dma_region elt_dma;
+45 -106
View File
@@ -223,86 +223,48 @@ static void r300EmitVec(GLcontext * ctx,
}
static GLuint t_type(struct dt *dt)
{
switch (dt->type) {
case GL_UNSIGNED_BYTE:
return AOS_FORMAT_UBYTE;
case GL_SHORT:
return AOS_FORMAT_USHORT;
case GL_FLOAT:
return AOS_FORMAT_FLOAT;
default:
assert(0);
break;
}
#define R300_VIR0_AOS_SIZE_SHIFT 0
#define R300_VIR0_AOS_INPUT_SHIFT 8
#define R300_VIR0_AOS_STOP_SHIFT 13
#define R300_VIR0_AOS_TYPE_SHIFT 14
#define R300_VIR0_HIGH_SHIFT 16
return AOS_FORMAT_FLOAT;
// Pack 4 elemets in a 16 bit (aos_size first 8, input next 5, 1 stop bit(Whild gues), aos_type last 2);
static inline GLuint t_vir_pack(GLvector4f ** dt, int *inputs, int i)
{
GLuint dw;
dw = (dt[i]->size - 1) << R300_VIR0_AOS_SIZE_SHIFT;
dw |= inputs[i] << R300_VIR0_AOS_INPUT_SHIFT;
//dw |= t_type(&dt[i]) << R300_VIR0_AOS_TYPE_SHIFT;
return dw;
}
static GLuint t_vir0_size(struct dt *dt)
{
switch (dt->type) {
case GL_UNSIGNED_BYTE:
return 4;
case GL_SHORT:
return 7;
case GL_FLOAT:
return dt->size - 1;
default:
assert(0);
break;
}
return 0;
}
static GLuint t_aos_size(struct dt *dt)
{
switch (dt->type) {
case GL_UNSIGNED_BYTE:
return 1;
case GL_SHORT:
return 2;
case GL_FLOAT:
return dt->size;
default:
assert(0);
break;
}
return 0;
}
static GLuint t_vir0(uint32_t * dst, struct dt *dt, int *inputs,
static GLuint t_vir0(uint32_t * dst, GLvector4f ** dt, int *inputs,
GLint * tab, GLuint nr)
{
GLuint i, dw;
GLuint i, dw, dwInternel;
for (i = 0; i + 1 < nr; i += 2) {
dw = t_vir0_size(&dt[tab[i]]) | (inputs[tab[i]] << 8) |
(t_type(&dt[tab[i]]) << 14);
dw |=
(t_vir0_size(&dt[tab[i + 1]]) |
(inputs[tab[i + 1]] << 8) | (t_type(&dt[tab[i + 1]])
<< 14)) << 16;
dw = t_vir_pack(dt, inputs, tab[i]);
dwInternel = t_vir_pack(dt, inputs, tab[i + 1]);
dw |= dwInternel << R300_VIR0_HIGH_SHIFT;
if (i + 2 == nr) {
dw |= (1 << (13 + 16));
dw |=
(1 <<
(R300_VIR0_AOS_STOP_SHIFT + R300_VIR0_HIGH_SHIFT));
}
dst[i >> 1] = dw;
dst[i >> 1] = dw; // Is the same as i/2
}
if (nr & 1) {
dw = t_vir0_size(&dt[tab[nr - 1]]) | (inputs[tab[nr - 1]]
<< 8) |
(t_type(&dt[tab[nr - 1]]) << 14);
dw |= 1 << 13;
dw = t_vir_pack(dt, inputs, tab[nr - 1]);
dw |= 1 << R300_VIR0_AOS_STOP_SHIFT;
dst[nr >> 1] = dw;
}
return (nr + 1) >> 1;
return (nr + 1) >> 1; // Is the same as (nr+1)/2
}
static GLuint t_swizzle(int swizzle[4])
@@ -331,11 +293,6 @@ static GLuint t_vir1(uint32_t * dst, int swizzle[][4], GLuint nr)
return (nr + 1) >> 1;
}
static GLuint t_emit_size(struct dt *dt)
{
return dt->size;
}
static GLuint t_vic(GLcontext * ctx, GLuint InputsRead)
{
r300ContextPtr r300 = R300_CONTEXT(ctx);
@@ -369,9 +326,10 @@ int r300EmitArrays(GLcontext * ctx)
{
r300ContextPtr rmesa = R300_CONTEXT(ctx);
r300ContextPtr r300 = rmesa;
struct radeon_vertex_buffer *VB = &rmesa->state.VB;
TNLcontext *tnl = TNL_CONTEXT(ctx);
struct vertex_buffer *vb = &tnl->vb;
GLuint nr;
GLuint count = VB->Count;
GLuint count = vb->Count;
GLuint i;
GLuint InputsRead = 0, OutputsWritten = 0;
int *inputs = NULL;
@@ -466,57 +424,38 @@ int r300EmitArrays(GLcontext * ctx)
swizzle[i][2] = SWIZZLE_ZERO;
swizzle[i][3] = SWIZZLE_ONE;
for (ci = 0; ci < VB->AttribPtr[tab[i]].size; ci++)
for (ci = 0; ci < vb->AttribPtr[tab[i]]->size; ci++)
swizzle[i][ci] = ci;
#if MESA_BIG_ENDIAN
#define SWAP_INT(a, b) do { \
int __temp; \
__temp = a;\
a = b; \
b = __temp; \
} while (0)
if (VB->AttribPtr[tab[i]].type == GL_UNSIGNED_BYTE) {
SWAP_INT(swizzle[i][0], swizzle[i][3]);
SWAP_INT(swizzle[i][1], swizzle[i][2]);
}
#endif /* MESA_BIG_ENDIAN */
if (r300IsGartMemory(rmesa, VB->AttribPtr[tab[i]].data,
if (r300IsGartMemory(rmesa, vb->AttribPtr[tab[i]]->data,
/*(count-1)*stride */ 4)) {
if (VB->AttribPtr[tab[i]].stride % 4)
if (vb->AttribPtr[tab[i]]->stride % 4)
return R300_FALLBACK_TCL;
rmesa->state.aos[i].address =
VB->AttribPtr[tab[i]].data;
(void *)(vb->AttribPtr[tab[i]]->data);
rmesa->state.aos[i].start = 0;
rmesa->state.aos[i].aos_offset =
r300GartOffsetFromVirtual(rmesa,
VB->
AttribPtr[tab[i]].data);
vb->
AttribPtr[tab[i]]->data);
rmesa->state.aos[i].aos_stride =
VB->AttribPtr[tab[i]].stride / 4;
vb->AttribPtr[tab[i]]->stride / 4;
rmesa->state.aos[i].aos_size =
t_emit_size(&VB->AttribPtr[tab[i]]);
vb->AttribPtr[tab[i]]->size;
} else {
/* TODO: r300EmitVec can only handle 4 byte vectors */
if (VB->AttribPtr[tab[i]].type != GL_FLOAT)
return R300_FALLBACK_TCL;
r300EmitVec(ctx, &rmesa->state.aos[i],
VB->AttribPtr[tab[i]].data,
t_emit_size(&VB->AttribPtr[tab[i]]),
VB->AttribPtr[tab[i]].stride, count);
vb->AttribPtr[tab[i]]->data,
vb->AttribPtr[tab[i]]->size,
vb->AttribPtr[tab[i]]->stride, count);
}
rmesa->state.aos[i].aos_size =
t_aos_size(&VB->AttribPtr[tab[i]]);
rmesa->state.aos[i].aos_size = vb->AttribPtr[tab[i]]->size;
comp_size = _mesa_sizeof_type(VB->AttribPtr[tab[i]].type);
comp_size = _mesa_sizeof_type(GL_FLOAT);
for (fix = 0; fix <= 4 - VB->AttribPtr[tab[i]].size; fix++) {
for (fix = 0; fix <= 4 - vb->AttribPtr[tab[i]]->size; fix++) {
if ((rmesa->state.aos[i].aos_offset -
comp_size * fix) % 4)
continue;
@@ -532,14 +471,14 @@ int r300EmitArrays(GLcontext * ctx)
rmesa->state.aos[i].aos_offset -= comp_size * fix;
for (ci = 0; ci < VB->AttribPtr[tab[i]].size; ci++)
for (ci = 0; ci < vb->AttribPtr[tab[i]]->size; ci++)
swizzle[i][ci] += fix;
} else {
WARN_ONCE
("Cannot handle offset %x with stride %d, comp %d\n",
rmesa->state.aos[i].aos_offset,
rmesa->state.aos[i].aos_stride,
VB->AttribPtr[tab[i]].size);
vb->AttribPtr[tab[i]]->size);
return R300_FALLBACK_TCL;
}
}
@@ -547,7 +486,7 @@ int r300EmitArrays(GLcontext * ctx)
/* setup INPUT_ROUTE */
R300_STATECHANGE(r300, vir[0]);
((drm_r300_cmd_header_t *) r300->hw.vir[0].cmd)->packet0.count =
t_vir0(&r300->hw.vir[0].cmd[R300_VIR_CNTL_0], VB->AttribPtr,
t_vir0(&r300->hw.vir[0].cmd[R300_VIR_CNTL_0], vb->AttribPtr,
inputs, tab, nr);
R300_STATECHANGE(r300, vir[1]);
+11 -61
View File
@@ -301,6 +301,8 @@ static void r300RunRenderPrimitive(r300ContextPtr rmesa, GLcontext * ctx,
int start, int end, int prim)
{
int type, num_verts;
TNLcontext *tnl = TNL_CONTEXT(ctx);
struct vertex_buffer *vb = &tnl->vb;
type = r300PrimitiveType(rmesa, ctx, prim);
num_verts = r300NumVerts(rmesa, end - start, prim);
@@ -308,88 +310,36 @@ static void r300RunRenderPrimitive(r300ContextPtr rmesa, GLcontext * ctx,
if (type < 0 || num_verts <= 0)
return;
if (rmesa->state.VB.Elts) {
if (vb->Elts) {
r300EmitAOS(rmesa, rmesa->state.aos_count, start);
if (num_verts > 65535) {
/* not implemented yet */
WARN_ONCE("Too many elts\n");
return;
}
r300EmitElts(ctx, rmesa->state.VB.Elts, num_verts,
rmesa->state.VB.elt_size);
r300EmitElts(ctx, vb->Elts, num_verts, 4);
r300FireEB(rmesa, rmesa->state.elt_dma.aos_offset,
num_verts, type, rmesa->state.VB.elt_size);
num_verts, type, 4);
} else {
r300EmitAOS(rmesa, rmesa->state.aos_count, start);
r300FireAOS(rmesa, num_verts, type);
}
}
#define CONV_VB(a, b) rvb->AttribPtr[(a)].size = vb->b->size, \
rvb->AttribPtr[(a)].type = GL_FLOAT, \
rvb->AttribPtr[(a)].stride = vb->b->stride, \
rvb->AttribPtr[(a)].data = vb->b->data
static void radeon_vb_to_rvb(r300ContextPtr rmesa,
struct radeon_vertex_buffer *rvb,
struct vertex_buffer *vb)
{
int i;
GLcontext *ctx;
ctx = rmesa->radeon.glCtx;
memset(rvb, 0, sizeof(*rvb));
rvb->Elts = vb->Elts;
rvb->elt_size = 4;
rvb->elt_min = 0;
rvb->elt_max = vb->Count;
rvb->Count = vb->Count;
if (hw_tcl_on) {
CONV_VB(VERT_ATTRIB_POS, ObjPtr);
} else {
assert(vb->ClipPtr);
CONV_VB(VERT_ATTRIB_POS, ClipPtr);
}
CONV_VB(VERT_ATTRIB_NORMAL, NormalPtr);
CONV_VB(VERT_ATTRIB_COLOR0, ColorPtr[0]);
CONV_VB(VERT_ATTRIB_COLOR1, SecondaryColorPtr[0]);
CONV_VB(VERT_ATTRIB_FOG, FogCoordPtr);
for (i = 0; i < ctx->Const.MaxTextureCoordUnits; i++)
CONV_VB(VERT_ATTRIB_TEX0 + i, TexCoordPtr[i]);
for (i = 0; i < MAX_VERTEX_PROGRAM_ATTRIBS; i++)
CONV_VB(VERT_ATTRIB_GENERIC0 + i,
AttribPtr[VERT_ATTRIB_GENERIC0 + i]);
rvb->Primitive = vb->Primitive;
rvb->PrimitiveCount = vb->PrimitiveCount;
rvb->LockFirst = rvb->LockCount = 0;
rvb->lock_uptodate = GL_FALSE;
}
static GLboolean r300RunRender(GLcontext * ctx,
struct tnl_pipeline_stage *stage)
{
r300ContextPtr rmesa = R300_CONTEXT(ctx);
struct radeon_vertex_buffer *VB = &rmesa->state.VB;
int i;
int cmd_reserved = 0;
int cmd_written = 0;
drm_radeon_cmd_header_t *cmd = NULL;
TNLcontext *tnl = TNL_CONTEXT(ctx);
struct vertex_buffer *vb = &tnl->vb;
if (RADEON_DEBUG & DEBUG_PRIMS)
fprintf(stderr, "%s\n", __FUNCTION__);
if (stage) {
TNLcontext *tnl = TNL_CONTEXT(ctx);
radeon_vb_to_rvb(rmesa, VB, &tnl->vb);
}
r300UpdateShaders(rmesa);
if (r300EmitArrays(ctx))
return GL_TRUE;
@@ -404,10 +354,10 @@ static GLboolean r300RunRender(GLcontext * ctx,
r300EmitState(rmesa);
for (i = 0; i < VB->PrimitiveCount; i++) {
GLuint prim = _tnl_translate_prim(&VB->Primitive[i]);
GLuint start = VB->Primitive[i].start;
GLuint end = VB->Primitive[i].start + VB->Primitive[i].count;
for (i = 0; i < vb->PrimitiveCount; i++) {
GLuint prim = _tnl_translate_prim(&vb->Primitive[i]);
GLuint start = vb->Primitive[i].start;
GLuint end = vb->Primitive[i].start + vb->Primitive[i].count;
r300RunRenderPrimitive(rmesa, ctx, start, end, prim);
}