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brw: Fix decoding of 3-src destination stride in EU validation

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Fixes: f1036da345 ("intel/brw: Add vstride/width/hstride to brw_hw_decoded_inst")
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33664>
This commit is contained in:
Caio Oliveira
2025-02-25 11:25:57 -08:00
committed by Marge Bot
parent f78a27eb18
commit 676b874ca9
1 changed files with 11 additions and 1 deletions
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src/intel/compiler/brw_eu_validate.c
+11 -1
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@@ -2419,6 +2419,16 @@ scalar_register_restrictions(const struct brw_isa_info *isa,
return error_msg;
}
static unsigned
DST_STRIDE_3SRC(unsigned hstride)
{
switch (hstride) {
case BRW_ALIGN1_3SRC_DST_HORIZONTAL_STRIDE_1: return 1;
case BRW_ALIGN1_3SRC_DST_HORIZONTAL_STRIDE_2: return 2;
}
unreachable("invalid hstride");
}
static unsigned
VSTRIDE_3SRC(unsigned vstride)
{
@@ -2607,7 +2617,7 @@ brw_hw_decode_inst(const struct brw_isa_info *isa,
inst->dst.type = brw_eu_inst_3src_a1_dst_type(devinfo, raw);
inst->dst.nr = brw_eu_inst_3src_dst_reg_nr(devinfo, raw);
inst->dst.subnr = brw_eu_inst_3src_a1_dst_subreg_nr(devinfo, raw) * 8;
inst->dst.hstride = STRIDE(brw_eu_inst_3src_a1_dst_hstride(devinfo, raw));
inst->dst.hstride = DST_STRIDE_3SRC(brw_eu_inst_3src_a1_dst_hstride(devinfo, raw));
inst->src[0].file = brw_eu_inst_3src_a1_src0_reg_file(devinfo, raw);
inst->src[0].type = brw_eu_inst_3src_a1_src0_type(devinfo, raw);