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radv: keep DCC compressed for clears on compute with image stores

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Without image stores, DCC is always decompressed on compute.

Cc: 21.1 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10168>
This commit is contained in:
Samuel Pitoiset
2021-04-12 09:24:46 +02:00
committed by Marge Bot
parent 84895dba7f
commit 66e1b42d06
1 changed files with 1 additions and 1 deletions
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src/amd/vulkan/radv_meta_clear.c
+1 -1
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@@ -2053,7 +2053,7 @@ radv_cmd_clear_image(struct radv_cmd_buffer *cmd_buffer, struct radv_image *imag
surf.level = range->baseMipLevel + l;
surf.layer = range->baseArrayLayer + s;
surf.aspect_mask = range->aspectMask;
surf.disable_compression = true;
surf.disable_compression = false;
radv_meta_clear_image_cs(cmd_buffer, &surf, &internal_clear_value.color);
} else {
radv_clear_image_layer(cmd_buffer, image, image_layout, range, format, l, s,