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aco: implement 16-bit nir_op_ffloor/nir_op_fceil

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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4452>
This commit is contained in:
Samuel Pitoiset
2020-04-03 11:47:54 +02:00
parent c097c9f20c
commit 66d5bfb09a
1 changed files with 13 additions and 7 deletions
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src/amd/compiler/aco_instruction_selection.cpp
+13 -7
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@@ -1880,10 +1880,14 @@ void visit_alu_instr(isel_context *ctx, nir_alu_instr *instr)
break;
}
case nir_op_ffloor: {
if (dst.size() == 1) {
Temp src = get_alu_src(ctx, instr->src[0]);
if (dst.regClass() == v2b) {
Temp tmp = bld.vop1(aco_opcode::v_floor_f16, bld.def(v1), src);
bld.pseudo(aco_opcode::p_split_vector, Definition(dst), bld.def(v2b), tmp);
} else if (dst.regClass() == v1) {
emit_vop1_instruction(ctx, instr, aco_opcode::v_floor_f32, dst);
} else if (dst.size() == 2) {
emit_floor_f64(ctx, bld, Definition(dst), get_alu_src(ctx, instr->src[0]));
} else if (dst.regClass() == v2) {
emit_floor_f64(ctx, bld, Definition(dst), src);
} else {
fprintf(stderr, "Unimplemented NIR instr bit size: ");
nir_print_instr(&instr->instr, stderr);
@@ -1892,15 +1896,17 @@ void visit_alu_instr(isel_context *ctx, nir_alu_instr *instr)
break;
}
case nir_op_fceil: {
if (dst.size() == 1) {
Temp src0 = get_alu_src(ctx, instr->src[0]);
if (dst.regClass() == v2b) {
Temp tmp = bld.vop1(aco_opcode::v_ceil_f16, bld.def(v1), src0);
bld.pseudo(aco_opcode::p_split_vector, Definition(dst), bld.def(v2b), tmp);
} else if (dst.regClass() == v1) {
emit_vop1_instruction(ctx, instr, aco_opcode::v_ceil_f32, dst);
} else if (dst.size() == 2) {
} else if (dst.regClass() == v2) {
if (ctx->options->chip_class >= GFX7) {
emit_vop1_instruction(ctx, instr, aco_opcode::v_ceil_f64, dst);
} else {
/* GFX6 doesn't support V_CEIL_F64, lower it. */
Temp src0 = get_alu_src(ctx, instr->src[0]);
/* trunc = trunc(src0)
* if (src0 > 0.0 && src0 != trunc)
* trunc += 1.0