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radv: adjust next stage for VS prologs and merged shaders compiled separately

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It should be the merged shader stage.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24933>
This commit is contained in:
Samuel Pitoiset
2023-09-08 11:41:18 +02:00
committed by Marge Bot
parent 524a894ba4
commit 657cabe17e
1 changed files with 7 additions and 1 deletions
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src/amd/vulkan/radv_cmd_buffer.c
+7 -1
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@@ -3803,7 +3803,13 @@ lookup_vs_prolog(struct radv_cmd_buffer *cmd_buffer, const struct radv_shader *v
key.as_ls = vs_shader->info.vs.as_ls && instance_rate_inputs;
key.is_ngg = vs_shader->info.is_ngg;
key.wave32 = vs_shader->info.wave_size == 32;
key.next_stage = vs_shader->info.stage;
if (vs_shader->info.merged_shader_compiled_separately) {
assert(vs_shader->info.next_stage == MESA_SHADER_TESS_CTRL || vs_shader->info.next_stage == MESA_SHADER_GEOMETRY);
key.next_stage = vs_shader->info.next_stage;
} else {
key.next_stage = vs_shader->info.stage;
}
union vs_prolog_key_header header;
header.v = 0;