radv: add gather_shader_info_vs() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
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@@ -242,27 +242,6 @@ gather_info_block(const nir_shader *nir, const nir_block *block, struct radv_sha
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}
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}
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static void
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gather_info_input_decl_vs(const nir_shader *nir, const nir_variable *var,
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const struct radv_pipeline_key *key, struct radv_shader_info *info)
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{
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unsigned attrib_count = glsl_count_attribute_slots(var->type, true);
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for (unsigned i = 0; i < attrib_count; ++i) {
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unsigned attrib_index = var->data.location + i - VERT_ATTRIB_GENERIC0;
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if (key->vs.instance_rate_inputs & (1u << attrib_index)) {
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info->vs.needs_instance_id = true;
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info->vs.needs_base_instance = true;
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}
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if (info->vs.use_per_attribute_vb_descs)
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info->vs.vb_desc_usage_mask |= 1u << attrib_index;
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else
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info->vs.vb_desc_usage_mask |= 1u << key->vs.vertex_attribute_bindings[attrib_index];
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}
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}
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static void
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mark_16bit_ps_input(struct radv_shader_info *info, const struct glsl_type *type, int location)
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{
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@@ -285,19 +264,6 @@ mark_16bit_ps_input(struct radv_shader_info *info, const struct glsl_type *type,
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}
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}
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static void
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gather_info_input_decl(const nir_shader *nir, const nir_variable *var,
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const struct radv_pipeline_key *key, struct radv_shader_info *info)
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{
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switch (nir->info.stage) {
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case MESA_SHADER_VERTEX:
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gather_info_input_decl_vs(nir, var, key, info);
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break;
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default:
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break;
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}
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}
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static void
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gather_xfb_info(const nir_shader *nir, struct radv_shader_info *info)
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{
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@@ -346,6 +312,46 @@ assign_outinfo_params(struct radv_vs_output_info *outinfo, uint64_t mask,
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}
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}
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static void
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gather_shader_info_vs(struct radv_device *device, const nir_shader *nir,
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const struct radv_pipeline_key *pipeline_key, struct radv_shader_info *info)
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{
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if (pipeline_key->vs.dynamic_input_state && nir->info.inputs_read) {
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info->vs.has_prolog = true;
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info->vs.dynamic_inputs = true;
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}
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/* Use per-attribute vertex descriptors to prevent faults and for correct bounds checking. */
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info->vs.use_per_attribute_vb_descs = device->robust_buffer_access || info->vs.dynamic_inputs;
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/* We have to ensure consistent input register assignments between the main shader and the
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* prolog.
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*/
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info->vs.needs_instance_id |= info->vs.has_prolog;
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info->vs.needs_base_instance |= info->vs.has_prolog;
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info->vs.needs_draw_id |= info->vs.has_prolog;
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nir_foreach_shader_in_variable(var, nir) {
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unsigned attrib_count = glsl_count_attribute_slots(var->type, true);
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for (unsigned i = 0; i < attrib_count; ++i) {
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unsigned attrib_index = var->data.location + i - VERT_ATTRIB_GENERIC0;
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if (pipeline_key->vs.instance_rate_inputs & (1u << attrib_index)) {
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info->vs.needs_instance_id = true;
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info->vs.needs_base_instance = true;
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}
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if (info->vs.use_per_attribute_vb_descs) {
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info->vs.vb_desc_usage_mask |= 1u << attrib_index;
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} else {
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info->vs.vb_desc_usage_mask |=
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1u << pipeline_key->vs.vertex_attribute_bindings[attrib_index];
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}
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}
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}
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}
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static void
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gather_shader_info_tcs(struct radv_device *device, const nir_shader *nir,
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const struct radv_pipeline_key *pipeline_key, struct radv_shader_info *info)
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@@ -520,27 +526,6 @@ radv_nir_shader_info_pass(struct radv_device *device, const struct nir_shader *n
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info->loads_dynamic_offsets = true;
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}
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if (nir->info.stage == MESA_SHADER_VERTEX) {
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if (pipeline_key->vs.dynamic_input_state && nir->info.inputs_read) {
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info->vs.has_prolog = true;
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info->vs.dynamic_inputs = true;
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}
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/* Use per-attribute vertex descriptors to prevent faults and
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* for correct bounds checking.
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*/
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info->vs.use_per_attribute_vb_descs = device->robust_buffer_access || info->vs.dynamic_inputs;
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}
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/* We have to ensure consistent input register assignments between the main shader and the
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* prolog. */
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info->vs.needs_instance_id |= info->vs.has_prolog;
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info->vs.needs_base_instance |= info->vs.has_prolog;
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info->vs.needs_draw_id |= info->vs.has_prolog;
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nir_foreach_shader_in_variable (variable, nir)
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gather_info_input_decl(nir, variable, pipeline_key, info);
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nir_foreach_block (block, func->impl) {
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gather_info_block(nir, block, info);
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}
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@@ -670,6 +655,7 @@ radv_nir_shader_info_pass(struct radv_device *device, const struct nir_shader *n
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gather_shader_info_tcs(device, nir, pipeline_key, info);
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break;
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case MESA_SHADER_VERTEX:
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gather_shader_info_vs(device, nir, pipeline_key, info);
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break;
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case MESA_SHADER_MESH:
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gather_shader_info_mesh(nir, info);
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