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ac/gpu_info: add kernel_flushes_tc_l2_after_ib

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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
Marek Olšák
2018-05-02 19:11:37 -04:00
parent 14c5a93bfa
commit 64265ac8d5
4 changed files with 7 additions and 2 deletions
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src/amd/common/ac_gpu_info.c
+4
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@@ -324,6 +324,9 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
info->has_gpu_reset_counter_query = false;
info->has_eqaa_surface_allocator = true;
info->has_format_bc1_through_bc7 = true;
/* DRM 3.1.0 doesn't flush TC for VI correctly. */
info->kernel_flushes_tc_l2_after_ib = info->chip_class != VI ||
info->drm_minor >= 2;
info->num_render_backends = amdinfo->rb_pipes;
/* The value returned by the kernel driver was wrong. */
@@ -479,6 +482,7 @@ void ac_print_gpu_info(struct radeon_info *info)
printf(" has_gpu_reset_counter_query = %u\n", info->has_gpu_reset_counter_query);
printf(" has_eqaa_surface_allocator = %u\n", info->has_eqaa_surface_allocator);
printf(" has_format_bc1_through_bc7 = %u\n", info->has_format_bc1_through_bc7);
printf(" kernel_flushes_tc_l2_after_ib = %u\n", info->kernel_flushes_tc_l2_after_ib);
printf("Shader core info:\n");
printf(" max_shader_clock = %i\n", info->max_shader_clock);
src/amd/common/ac_gpu_info.h
+1
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@@ -104,6 +104,7 @@ struct radeon_info {
bool has_gpu_reset_counter_query;
bool has_eqaa_surface_allocator;
bool has_format_bc1_through_bc7;
bool kernel_flushes_tc_l2_after_ib;
/* Shader cores. */
uint32_t r600_max_quad_pipes; /* wave size / 16 */
src/gallium/drivers/radeonsi/si_gfx_cs.c
+1 -2
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@@ -74,8 +74,7 @@ void si_flush_gfx_cs(struct si_context *ctx, unsigned flags,
if (ctx->gfx_flush_in_progress)
return;
if (ctx->chip_class == VI && ctx->screen->info.drm_minor <= 1) {
/* DRM 3.1.0 doesn't flush TC for VI correctly. */
if (!ctx->screen->info.kernel_flushes_tc_l2_after_ib) {
wait_flags |= SI_CONTEXT_PS_PARTIAL_FLUSH |
SI_CONTEXT_CS_PARTIAL_FLUSH |
SI_CONTEXT_INV_GLOBAL_L2;
src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
+1
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@@ -538,6 +538,7 @@ static bool do_winsys_init(struct radeon_drm_winsys *ws)
ws->info.has_gpu_reset_counter_query = ws->info.drm_minor >= 43;
ws->info.has_eqaa_surface_allocator = false;
ws->info.has_format_bc1_through_bc7 = ws->info.drm_minor >= 31;
ws->info.kernel_flushes_tc_l2_after_ib = true;
ws->check_vm = strstr(debug_get_option("R600_DEBUG", ""), "check_vm") != NULL;