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i965: Fix off-by-ones in handling the last members of register classes.

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Luckily, one of them would result in failing out register allocation
when the other bugs were encountered.  Applies to
glsl-fs-vec4-indexing-temp-dst-in-nested-loop-combined, which still
fails register allocation, but now legitimately.
This commit is contained in:
Eric Anholt
2010-10-01 16:36:17 -07:00
parent afb64311e3
commit 6397addd61
1 changed files with 5 additions and 5 deletions
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src/mesa/drivers/dri/i965/brw_fs.cpp
+5 -5
View File
@@ -2326,15 +2326,15 @@ fs_visitor::assign_regs()
* that alias base regs, or the base regs themselves for classes[0].
*/
for (int c = 0; c <= i; c++) {
for (int i_r = 0; i_r < class_reg_count[i] - 1; i_r++) {
for (int i_r = 0; i_r < class_reg_count[i]; i_r++) {
for (int c_r = MAX2(0, i_r - (class_sizes[c] - 1));
c_r <= MIN2(class_reg_count[c] - 1, i_r + class_sizes[i] - 1);
c_r < MIN2(class_reg_count[c], i_r + class_sizes[i]);
c_r++) {
if (0) {
printf("%d/%d conflicts %d/%d\n",
class_sizes[i], i_r,
class_sizes[c], c_r);
class_sizes[i], this->first_non_payload_grf + i_r,
class_sizes[c], this->first_non_payload_grf + c_r);
}
ra_add_reg_conflict(regs,
@@ -2413,7 +2413,7 @@ fs_visitor::assign_regs()
for (int c = 0; c < class_count; c++) {
if (reg >= class_base_reg[c] &&
reg < class_base_reg[c] + class_reg_count[c] - 1) {
reg < class_base_reg[c] + class_reg_count[c]) {
hw_reg = reg - class_base_reg[c];
break;
}