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i915: Convert to using VBs instead of inline prims.

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This commit is contained in:
Eric Anholt
2008-06-20 15:00:44 -07:00
parent 0da9bc6a69
commit 62d66caeba
9 changed files with 305 additions and 220 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/mesa/drivers/dri/i915/i830_reg.h
-4
View File
@@ -494,10 +494,6 @@
#define VFT1_TEX0_FMT(x) (x)
#define VFT1_TEX0_MASK 3
#define VFT1_TEX1_SHIFT 2
#define TEXCOORDFMT_2D 0
#define TEXCOORDFMT_3D 1
#define TEXCOORDFMT_4D 2
#define TEXCOORDFMT_1D 3
/*New stuff picked up along the way */
src/mesa/drivers/dri/i915/i830_vtbl.c
+6 -1
View File
@@ -31,6 +31,7 @@
#include "i830_reg.h"
#include "intel_batchbuffer.h"
#include "intel_regions.h"
#include "intel_tris.h"
#include "tnl/t_context.h"
#include "tnl/t_vertex.h"
@@ -435,7 +436,8 @@ i830_emit_state(struct intel_context *intel)
* Set the space as LOOP_CLIPRECTS now, since that's what our primitives
* will be emitted under.
*/
intel_batchbuffer_require_space(intel->batch, get_state_size(state) + 8,
intel_batchbuffer_require_space(intel->batch,
get_state_size(state) + INTEL_PRIM_EMIT_SIZE,
LOOP_CLIPRECTS);
count = 0;
again:
@@ -675,6 +677,9 @@ i830_new_batch(struct intel_context *intel)
struct i830_context *i830 = i830_context(&intel->ctx);
i830->state.emitted = 0;
/* Signal that we should put new vertices into a new vertex buffer. */
intel->prim.needs_new_vb = GL_TRUE;
/* Check that we didn't just wrap our batchbuffer at a bad time. */
assert(!intel->no_batch_wrap);
}
src/mesa/drivers/dri/i915/i915_reg.h
-112
View File
@@ -325,118 +325,6 @@
#define SCISSOR_RECT_0_YMAX(x) ((x)<<16)
#define SCISSOR_RECT_0_XMAX(x) (x)
/* p189 */
#define _3DSTATE_LOAD_STATE_IMMEDIATE_1 ((0x3<<29)|(0x1d<<24)|(0x04<<16))
#define I1_LOAD_S(n) (1<<(4+n))
#define S0_VB_OFFSET_MASK 0xffffffc
#define S0_AUTO_CACHE_INV_DISABLE (1<<0)
#define S1_VERTEX_WIDTH_SHIFT 24
#define S1_VERTEX_WIDTH_MASK (0x3f<<24)
#define S1_VERTEX_PITCH_SHIFT 16
#define S1_VERTEX_PITCH_MASK (0x3f<<16)
#define TEXCOORDFMT_2D 0x0
#define TEXCOORDFMT_3D 0x1
#define TEXCOORDFMT_4D 0x2
#define TEXCOORDFMT_1D 0x3
#define TEXCOORDFMT_2D_16 0x4
#define TEXCOORDFMT_4D_16 0x5
#define TEXCOORDFMT_NOT_PRESENT 0xf
#define S2_TEXCOORD_FMT0_MASK 0xf
#define S2_TEXCOORD_FMT1_SHIFT 4
#define S2_TEXCOORD_FMT(unit, type) ((type)<<(unit*4))
#define S2_TEXCOORD_NONE (~0)
/* S3 not interesting */
#define S4_POINT_WIDTH_SHIFT 23
#define S4_POINT_WIDTH_MASK (0x1ff<<23)
#define S4_LINE_WIDTH_SHIFT 19
#define S4_LINE_WIDTH_ONE (0x2<<19)
#define S4_LINE_WIDTH_MASK (0xf<<19)
#define S4_FLATSHADE_ALPHA (1<<18)
#define S4_FLATSHADE_FOG (1<<17)
#define S4_FLATSHADE_SPECULAR (1<<16)
#define S4_FLATSHADE_COLOR (1<<15)
#define S4_CULLMODE_BOTH (0<<13)
#define S4_CULLMODE_NONE (1<<13)
#define S4_CULLMODE_CW (2<<13)
#define S4_CULLMODE_CCW (3<<13)
#define S4_CULLMODE_MASK (3<<13)
#define S4_VFMT_POINT_WIDTH (1<<12)
#define S4_VFMT_SPEC_FOG (1<<11)
#define S4_VFMT_COLOR (1<<10)
#define S4_VFMT_DEPTH_OFFSET (1<<9)
#define S4_VFMT_XYZ (1<<6)
#define S4_VFMT_XYZW (2<<6)
#define S4_VFMT_XY (3<<6)
#define S4_VFMT_XYW (4<<6)
#define S4_VFMT_XYZW_MASK (7<<6)
#define S4_FORCE_DEFAULT_DIFFUSE (1<<5)
#define S4_FORCE_DEFAULT_SPECULAR (1<<4)
#define S4_LOCAL_DEPTH_OFFSET_ENABLE (1<<3)
#define S4_VFMT_FOG_PARAM (1<<2)
#define S4_SPRITE_POINT_ENABLE (1<<1)
#define S4_LINE_ANTIALIAS_ENABLE (1<<0)
#define S4_VFMT_MASK (S4_VFMT_POINT_WIDTH | \
S4_VFMT_SPEC_FOG | \
S4_VFMT_COLOR | \
S4_VFMT_DEPTH_OFFSET | \
S4_VFMT_XYZW_MASK | \
S4_VFMT_FOG_PARAM)
#define S5_WRITEDISABLE_ALPHA (1<<31)
#define S5_WRITEDISABLE_RED (1<<30)
#define S5_WRITEDISABLE_GREEN (1<<29)
#define S5_WRITEDISABLE_BLUE (1<<28)
#define S5_WRITEDISABLE_MASK (0xf<<28)
#define S5_FORCE_DEFAULT_POINT_SIZE (1<<27)
#define S5_LAST_PIXEL_ENABLE (1<<26)
#define S5_GLOBAL_DEPTH_OFFSET_ENABLE (1<<25)
#define S5_FOG_ENABLE (1<<24)
#define S5_STENCIL_REF_SHIFT 16
#define S5_STENCIL_REF_MASK (0xff<<16)
#define S5_STENCIL_TEST_FUNC_SHIFT 13
#define S5_STENCIL_TEST_FUNC_MASK (0x7<<13)
#define S5_STENCIL_FAIL_SHIFT 10
#define S5_STENCIL_FAIL_MASK (0x7<<10)
#define S5_STENCIL_PASS_Z_FAIL_SHIFT 7
#define S5_STENCIL_PASS_Z_FAIL_MASK (0x7<<7)
#define S5_STENCIL_PASS_Z_PASS_SHIFT 4
#define S5_STENCIL_PASS_Z_PASS_MASK (0x7<<4)
#define S5_STENCIL_WRITE_ENABLE (1<<3)
#define S5_STENCIL_TEST_ENABLE (1<<2)
#define S5_COLOR_DITHER_ENABLE (1<<1)
#define S5_LOGICOP_ENABLE (1<<0)
#define S6_ALPHA_TEST_ENABLE (1<<31)
#define S6_ALPHA_TEST_FUNC_SHIFT 28
#define S6_ALPHA_TEST_FUNC_MASK (0x7<<28)
#define S6_ALPHA_REF_SHIFT 20
#define S6_ALPHA_REF_MASK (0xff<<20)
#define S6_DEPTH_TEST_ENABLE (1<<19)
#define S6_DEPTH_TEST_FUNC_SHIFT 16
#define S6_DEPTH_TEST_FUNC_MASK (0x7<<16)
#define S6_CBUF_BLEND_ENABLE (1<<15)
#define S6_CBUF_BLEND_FUNC_SHIFT 12
#define S6_CBUF_BLEND_FUNC_MASK (0x7<<12)
#define S6_CBUF_SRC_BLEND_FACT_SHIFT 8
#define S6_CBUF_SRC_BLEND_FACT_MASK (0xf<<8)
#define S6_CBUF_DST_BLEND_FACT_SHIFT 4
#define S6_CBUF_DST_BLEND_FACT_MASK (0xf<<4)
#define S6_DEPTH_WRITE_ENABLE (1<<3)
#define S6_COLOR_WRITE_ENABLE (1<<2)
#define S6_TRISTRIP_PV_SHIFT 0
#define S6_TRISTRIP_PV_MASK (0x3<<0)
#define S7_DEPTH_OFFSET_CONST_MASK ~0
/* Helper macros for blend factors
*/
#define DST_BLND_FACT(f) ((f)<<S6_CBUF_DST_BLEND_FACT_SHIFT)
src/mesa/drivers/dri/i915/i915_vtbl.c
+5 -1
View File
@@ -39,6 +39,7 @@
#include "intel_batchbuffer.h"
#include "intel_tex.h"
#include "intel_regions.h"
#include "intel_tris.h"
#include "i915_reg.h"
#include "i915_context.h"
@@ -313,7 +314,8 @@ i915_emit_state(struct intel_context *intel)
* Set the space as LOOP_CLIPRECTS now, since that's what our primitives
* will be emitted under.
*/
intel_batchbuffer_require_space(intel->batch, get_state_size(state) + 8,
intel_batchbuffer_require_space(intel->batch,
get_state_size(state) + INTEL_PRIM_EMIT_SIZE,
LOOP_CLIPRECTS);
count = 0;
again:
@@ -587,6 +589,8 @@ i915_new_batch(struct intel_context *intel)
* difficulties associated with them (physical address requirements).
*/
i915->state.emitted = 0;
/* Signal that we should put new vertices into a new vertex buffer. */
intel->prim.needs_new_vb = GL_TRUE;
/* Check that we didn't just wrap our batchbuffer at a bad time. */
assert(!intel->no_batch_wrap);
src/mesa/drivers/dri/i915/intel_render.c
+6 -7
View File
@@ -67,7 +67,7 @@
#define HAVE_ELTS 0
static GLuint hw_prim[GL_POLYGON + 1] = {
static uint32_t hw_prim[GL_POLYGON + 1] = {
0,
PRIM3D_LINELIST,
PRIM3D_LINESTRIP,
@@ -114,7 +114,7 @@ intelDmaPrimitive(struct intel_context *intel, GLenum prim)
fprintf(stderr, "%s %s\n", __FUNCTION__, _mesa_lookup_enum_by_nr(prim));
INTEL_FIREVERTICES(intel);
intel->vtbl.reduced_primitive_state(intel, reduced_prim[prim]);
intelStartInlinePrimitive(intel, hw_prim[prim], LOOP_CLIPRECTS);
intel_set_prim(intel, hw_prim[prim]);
}
@@ -126,12 +126,11 @@ do { \
#define FLUSH() INTEL_FIREVERTICES(intel)
#define GET_SUBSEQUENT_VB_MAX_VERTS() \
((intel->batch->size - 1500) / (intel->vertex_size*4))
#define GET_CURRENT_VB_MAX_VERTS() GET_SUBSEQUENT_VB_MAX_VERTS()
#define GET_SUBSEQUENT_VB_MAX_VERTS() (INTEL_VB_SIZE / (intel->vertex_size * 4))
#define GET_CURRENT_VB_MAX_VERTS() \
((INTEL_VB_SIZE - intel->prim.current_offset) / (intel->vertex_size * 4))
#define ALLOC_VERTS( nr ) \
intelExtendInlinePrimitive( intel, (nr) * intel->vertex_size )
#define ALLOC_VERTS(nr) intel_get_prim_space(intel, nr)
#define EMIT_VERTS( ctx, j, nr, buf ) \
_tnl_emit_vertices_to_buffer(ctx, j, (j)+(nr), buf )
src/mesa/drivers/dri/i915/intel_tris.c
+145 -86
View File
@@ -25,6 +25,12 @@
*
**************************************************************************/
/** @file intel_tris.c
*
* This file contains functions for managing the vertex buffer and emitting
* primitives into it.
*/
#include "glheader.h"
#include "context.h"
#include "macros.h"
@@ -47,111 +53,159 @@
#include "intel_reg.h"
#include "intel_span.h"
#include "intel_tex.h"
#include "intel_chipset.h"
#include "i830_context.h"
#include "i830_reg.h"
static void intelRenderPrimitive(GLcontext * ctx, GLenum prim);
static void intelRasterPrimitive(GLcontext * ctx, GLenum rprim,
GLuint hwprim);
/*
*/
static void
intel_flush_inline_primitive(struct intel_context *intel)
/** Sets the primitive type for a primitive sequence, flushing as needed. */
void intel_set_prim(struct intel_context *intel, uint32_t prim)
{
GLuint used = intel->batch->ptr - intel->prim.start_ptr;
assert(intel->prim.primitive != ~0);
/* _mesa_printf("/\n"); */
if (used < 8)
goto do_discard;
*(int *) intel->prim.start_ptr = (_3DPRIMITIVE |
intel->prim.primitive | (used / 4 - 2));
goto finished;
do_discard:
intel->batch->ptr -= used;
finished:
intel->prim.primitive = ~0;
intel->prim.start_ptr = 0;
intel->prim.flush = 0;
if (prim != intel->prim.primitive) {
INTEL_FIREVERTICES(intel);
intel->prim.primitive = prim;
}
}
/** Returns mapped VB space for the given number of vertices */
uint32_t *intel_get_prim_space(struct intel_context *intel, unsigned int count)
{
uint32_t *addr;
/* Emit a primitive referencing vertices in a vertex buffer.
*/
void
intelStartInlinePrimitive(struct intel_context *intel,
GLuint prim, GLuint batch_flags)
/* Check for space in the existing VB */
if (intel->prim.vb_bo == NULL ||
intel->prim.needs_new_vb ||
(intel->prim.current_offset +
count * intel->vertex_size * 4) > INTEL_VB_SIZE ||
(intel->prim.count + count) >= (1 << 16)) {
/* Flush existing prim if any */
INTEL_FIREVERTICES(intel);
/* Start a new VB */
dri_bo_unreference(intel->prim.vb_bo);
intel->prim.vb_bo = dri_bo_alloc(intel->bufmgr, "vb",
INTEL_VB_SIZE, 4);
intel->prim.start_offset = 0;
intel->prim.current_offset = 0;
dri_bufmgr_check_aperture_space(intel->prim.vb_bo);
intel->prim.needs_new_vb = GL_FALSE;
dri_bo_map(intel->prim.vb_bo, GL_TRUE);
}
intel->prim.flush = intel_flush_prim;
addr = (uint32_t *)((char *)intel->prim.vb_bo->virtual +
intel->prim.current_offset);
intel->prim.current_offset += intel->vertex_size * 4 * count;
intel->prim.count += count;
return addr;
}
/** Dispatches the accumulated primitive to the batchbuffer. */
void intel_flush_prim(struct intel_context *intel)
{
BATCH_LOCALS;
/* Must be called after an intel_start_prim. */
assert(intel->prim.primitive != ~0);
if (intel->prim.count == 0)
return;
intel_wait_flips(intel);
dri_bo_unmap(intel->prim.vb_bo);
intel->vtbl.emit_state(intel);
/* Ensure that we don't start a new batch for the following emit, which
* depends on the state just emitted. emit_state should be making sure we
* have the space for this.
*/
intel->no_batch_wrap = GL_TRUE;
/* _mesa_printf("%s *", __progname); */
/* Emit a slot which will be filled with the inline primitive
* command later.
/* Check that we actually emitted the state into this batch, using the
* UPLOAD_CTX bit as the signal.
*/
BEGIN_BATCH(2, batch_flags);
OUT_BATCH(0);
assert((intel->batch->dirty_state & (1<<1)) == 0);
intel->prim.start_ptr = intel->batch->ptr;
intel->prim.primitive = prim;
intel->prim.flush = intel_flush_inline_primitive;
#if 0
printf("emitting %d..%d=%d vertices size %d\n", intel->prim.start_offset,
intel->prim.current_offset, intel->prim.count,
intel->vertex_size * 4);
#endif
OUT_BATCH(0);
ADVANCE_BATCH();
if (IS_9XX(intel->intelScreen->deviceID)) {
BEGIN_BATCH(5, LOOP_CLIPRECTS);
OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
I1_LOAD_S(0) | I1_LOAD_S(1) | 1);
assert((intel->prim.start_offset & !S0_VB_OFFSET_MASK) == 0);
OUT_RELOC(intel->prim.vb_bo, I915_GEM_DOMAIN_VERTEX, 0,
intel->prim.start_offset);
OUT_BATCH((intel->vertex_size << S1_VERTEX_WIDTH_SHIFT) |
(intel->vertex_size << S1_VERTEX_PITCH_SHIFT));
OUT_BATCH(_3DPRIMITIVE |
PRIM_INDIRECT |
PRIM_INDIRECT_SEQUENTIAL |
intel->prim.primitive |
intel->prim.count);
OUT_BATCH(0); /* Beginning vertex index */
ADVANCE_BATCH();
} else {
struct i830_context *i830 = i830_context(&intel->ctx);
BEGIN_BATCH(5, LOOP_CLIPRECTS);
OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
I1_LOAD_S(0) | I1_LOAD_S(2) | 1);
/* S0 */
assert((intel->prim.start_offset & !S0_VB_OFFSET_MASK_830) == 0);
OUT_RELOC(intel->prim.vb_bo, I915_GEM_DOMAIN_VERTEX, 0,
intel->prim.start_offset |
(intel->vertex_size << S0_VB_PITCH_SHIFT_830) |
S0_VB_ENABLE_830);
/* S1
* This is somewhat unfortunate -- VB width is tied up with
* vertex format data that we've already uploaded through
* _3DSTATE_VFT[01]_CMD. We may want to replace emits of VFT state with
* STATE_IMMEDIATE_1 like this to avoid duplication.
*/
OUT_BATCH((i830->state.Ctx[I830_CTXREG_VF] & VFT0_TEX_COUNT_MASK) >>
VFT0_TEX_COUNT_SHIFT << S2_TEX_COUNT_SHIFT_830 |
(i830->state.Ctx[I830_CTXREG_VF2] << 16) |
intel->vertex_size << S2_VERTEX_0_WIDTH_SHIFT_830);
OUT_BATCH(_3DPRIMITIVE |
PRIM_INDIRECT |
PRIM_INDIRECT_SEQUENTIAL |
intel->prim.primitive |
intel->prim.count);
OUT_BATCH(0); /* Beginning vertex index */
ADVANCE_BATCH();
}
intel->no_batch_wrap = GL_FALSE;
/* _mesa_printf(">"); */
/* If we're going to keep using this VB for more primitives, map it
* again.
*/
if (!intel->prim.needs_new_vb)
dri_bo_map(intel->prim.vb_bo, GL_TRUE);
intel->prim.flush = NULL;
intel->prim.start_offset = intel->prim.current_offset;
if (!IS_9XX(intel->intelScreen->deviceID))
intel->prim.start_offset = ALIGN(intel->prim.start_offset, 128);
intel->prim.count = 0;
}
void
intelWrapInlinePrimitive(struct intel_context *intel)
{
GLuint prim = intel->prim.primitive;
enum cliprect_mode cliprect_mode = intel->batch->cliprect_mode;
intel_flush_inline_primitive(intel);
intel_batchbuffer_flush(intel->batch);
intelStartInlinePrimitive(intel, prim, cliprect_mode); /* ??? */
}
GLuint *
intelExtendInlinePrimitive(struct intel_context *intel, GLuint dwords)
{
GLuint sz = dwords * sizeof(GLuint);
GLuint *ptr;
assert(intel->prim.flush == intel_flush_inline_primitive);
if (intel_batchbuffer_space(intel->batch) < sz)
intelWrapInlinePrimitive(intel);
/* _mesa_printf("."); */
intel->vtbl.assert_not_dirty(intel);
ptr = (GLuint *) intel->batch->ptr;
intel->batch->ptr += sz;
return ptr;
}
/***********************************************************************
* Emit primitives as inline vertices *
***********************************************************************/
@@ -182,7 +236,7 @@ intel_draw_quad(struct intel_context *intel,
intelVertexPtr v1, intelVertexPtr v2, intelVertexPtr v3)
{
GLuint vertsize = intel->vertex_size;
GLuint *vb = intelExtendInlinePrimitive(intel, 6 * vertsize);
GLuint *vb = intel_get_prim_space(intel, 6);
int j;
COPY_DWORDS(j, vb, vertsize, v0);
@@ -210,7 +264,7 @@ intel_draw_triangle(struct intel_context *intel,
intelVertexPtr v0, intelVertexPtr v1, intelVertexPtr v2)
{
GLuint vertsize = intel->vertex_size;
GLuint *vb = intelExtendInlinePrimitive(intel, 3 * vertsize);
GLuint *vb = intel_get_prim_space(intel, 3);
int j;
COPY_DWORDS(j, vb, vertsize, v0);
@@ -224,7 +278,7 @@ intel_draw_line(struct intel_context *intel,
intelVertexPtr v0, intelVertexPtr v1)
{
GLuint vertsize = intel->vertex_size;
GLuint *vb = intelExtendInlinePrimitive(intel, 2 * vertsize);
GLuint *vb = intel_get_prim_space(intel, 2);
int j;
COPY_DWORDS(j, vb, vertsize, v0);
@@ -236,7 +290,7 @@ static void
intel_draw_point(struct intel_context *intel, intelVertexPtr v0)
{
GLuint vertsize = intel->vertex_size;
GLuint *vb = intelExtendInlinePrimitive(intel, vertsize);
GLuint *vb = intel_get_prim_space(intel, 1);
int j;
/* Adjust for sub pixel position -- still required for conform. */
@@ -745,7 +799,7 @@ intelFastRenderClippedPoly(GLcontext * ctx, const GLuint * elts, GLuint n)
{
struct intel_context *intel = intel_context(ctx);
const GLuint vertsize = intel->vertex_size;
GLuint *vb = intelExtendInlinePrimitive(intel, (n - 2) * 3 * vertsize);
GLuint *vb = intel_get_prim_space(intel, (n - 2) * 3);
GLubyte *vertptr = (GLubyte *) intel->verts;
const GLuint *start = (const GLuint *) V(elts[0]);
int i, j;
@@ -950,7 +1004,7 @@ intelRasterPrimitive(GLcontext * ctx, GLenum rprim, GLuint hwprim)
if (hwprim != intel->prim.primitive) {
INTEL_FIREVERTICES(intel);
intelStartInlinePrimitive(intel, hwprim, LOOP_CLIPRECTS);
intel_set_prim(intel, hwprim);
}
}
@@ -1083,15 +1137,18 @@ intel_meta_draw_poly(struct intel_context *intel,
union fi *vb;
GLint i;
GLboolean was_locked = intel->locked;
unsigned int saved_vertex_size = intel->vertex_size;
if (!was_locked)
LOCK_HARDWARE(intel);
intel->vertex_size = 6;
/* All 3d primitives should be emitted with LOOP_CLIPRECTS,
* otherwise the drawing origin (DR4) might not be set correctly.
*/
intelStartInlinePrimitive(intel, PRIM3D_TRIFAN, LOOP_CLIPRECTS);
vb = (union fi *) intelExtendInlinePrimitive(intel, n * 6);
intel_set_prim(intel, PRIM3D_TRIFAN);
vb = (union fi *) intel_get_prim_space(intel, n);
for (i = 0; i < n; i++) {
vb[0].f = xy[i][0];
@@ -1105,6 +1162,8 @@ intel_meta_draw_poly(struct intel_context *intel,
INTEL_FIREVERTICES(intel);
intel->vertex_size = saved_vertex_size;
if (!was_locked)
UNLOCK_HARDWARE(intel);
}
src/mesa/drivers/dri/i915/intel_tris.h
+6 -7
View File
@@ -30,7 +30,9 @@
#include "mtypes.h"
#define INTEL_VB_SIZE (8 * 1024)
/** 3 dwords of state_immediate and 2 of 3dprim, in intel_flush_prim */
#define INTEL_PRIM_EMIT_SIZE (5 * 4)
#define _INTEL_NEW_RENDERSTATE (_DD_NEW_LINE_STIPPLE | \
_DD_NEW_TRI_UNFILLED | \
@@ -44,11 +46,8 @@ extern void intelInitTriFuncs(GLcontext * ctx);
extern void intelChooseRenderState(GLcontext * ctx);
extern void intelStartInlinePrimitive(struct intel_context *intel,
GLuint prim, GLuint flags);
extern void intelWrapInlinePrimitive(struct intel_context *intel);
GLuint *intelExtendInlinePrimitive(struct intel_context *intel,
GLuint dwords);
void intel_set_prim(struct intel_context *intel, uint32_t prim);
GLuint *intel_get_prim_space(struct intel_context *intel, unsigned int count);
void intel_flush_prim(struct intel_context *intel);
#endif
src/mesa/drivers/dri/intel/intel_context.h
+12 -2
View File
@@ -182,9 +182,19 @@ struct intel_context
struct
{
GLuint id;
GLuint primitive;
GLubyte *start_ptr;
uint32_t primitive; /**< Current hardware primitive type */
void (*flush) (struct intel_context *);
dri_bo *vb_bo;
unsigned int start_offset; /**< Byte offset of primitive sequence */
unsigned int current_offset; /**< Byte offset of next vertex */
unsigned int count; /**< Number of vertices in current primitive */
/**
* Signals when a new VB should be started, regardless of remaining
* space.
*
* Used to avoid rewriting a VB that's being rendered from.
*/
GLboolean needs_new_vb;
} prim;
GLuint stats_wm;
src/mesa/drivers/dri/intel/intel_reg.h
+125
View File
@@ -40,6 +40,131 @@
#define MI_WAIT_FOR_PLANE_B_FLIP (1<<6)
#define MI_WAIT_FOR_PLANE_A_FLIP (1<<2)
/* p189 */
#define _3DSTATE_LOAD_STATE_IMMEDIATE_1 (CMD_3D | (0x1d<<24) | (0x04<<16))
#define I1_LOAD_S(n) (1<<(4+n))
/** @{
* 915 definitions
*/
#define S0_VB_OFFSET_MASK 0xffffffc
#define S0_AUTO_CACHE_INV_DISABLE (1<<0)
/** @} */
/** @{
* 830 definitions
*/
#define S0_VB_OFFSET_MASK_830 0xffffff8
#define S0_VB_PITCH_SHIFT_830 1
#define S0_VB_ENABLE_830 0
/** @} */
#define S1_VERTEX_WIDTH_SHIFT 24
#define S1_VERTEX_WIDTH_MASK (0x3f<<24)
#define S1_VERTEX_PITCH_SHIFT 16
#define S1_VERTEX_PITCH_MASK (0x3f<<16)
#define TEXCOORDFMT_2D 0x0
#define TEXCOORDFMT_3D 0x1
#define TEXCOORDFMT_4D 0x2
#define TEXCOORDFMT_1D 0x3
#define TEXCOORDFMT_2D_16 0x4
#define TEXCOORDFMT_4D_16 0x5
#define TEXCOORDFMT_NOT_PRESENT 0xf
#define S2_TEXCOORD_FMT0_MASK 0xf
#define S2_TEXCOORD_FMT1_SHIFT 4
#define S2_TEXCOORD_FMT(unit, type) ((type)<<(unit*4))
#define S2_TEXCOORD_NONE (~0)
#define S2_TEX_COUNT_SHIFT_830 12
#define S2_VERTEX_0_WIDTH_SHIFT_830 0
#define S2_VERTEX_1_WIDTH_SHIFT_830 6
/* S3 not interesting */
#define S4_POINT_WIDTH_SHIFT 23
#define S4_POINT_WIDTH_MASK (0x1ff<<23)
#define S4_LINE_WIDTH_SHIFT 19
#define S4_LINE_WIDTH_ONE (0x2<<19)
#define S4_LINE_WIDTH_MASK (0xf<<19)
#define S4_FLATSHADE_ALPHA (1<<18)
#define S4_FLATSHADE_FOG (1<<17)
#define S4_FLATSHADE_SPECULAR (1<<16)
#define S4_FLATSHADE_COLOR (1<<15)
#define S4_CULLMODE_BOTH (0<<13)
#define S4_CULLMODE_NONE (1<<13)
#define S4_CULLMODE_CW (2<<13)
#define S4_CULLMODE_CCW (3<<13)
#define S4_CULLMODE_MASK (3<<13)
#define S4_VFMT_POINT_WIDTH (1<<12)
#define S4_VFMT_SPEC_FOG (1<<11)
#define S4_VFMT_COLOR (1<<10)
#define S4_VFMT_DEPTH_OFFSET (1<<9)
#define S4_VFMT_XYZ (1<<6)
#define S4_VFMT_XYZW (2<<6)
#define S4_VFMT_XY (3<<6)
#define S4_VFMT_XYW (4<<6)
#define S4_VFMT_XYZW_MASK (7<<6)
#define S4_FORCE_DEFAULT_DIFFUSE (1<<5)
#define S4_FORCE_DEFAULT_SPECULAR (1<<4)
#define S4_LOCAL_DEPTH_OFFSET_ENABLE (1<<3)
#define S4_VFMT_FOG_PARAM (1<<2)
#define S4_SPRITE_POINT_ENABLE (1<<1)
#define S4_LINE_ANTIALIAS_ENABLE (1<<0)
#define S4_VFMT_MASK (S4_VFMT_POINT_WIDTH | \
S4_VFMT_SPEC_FOG | \
S4_VFMT_COLOR | \
S4_VFMT_DEPTH_OFFSET | \
S4_VFMT_XYZW_MASK | \
S4_VFMT_FOG_PARAM)
#define S5_WRITEDISABLE_ALPHA (1<<31)
#define S5_WRITEDISABLE_RED (1<<30)
#define S5_WRITEDISABLE_GREEN (1<<29)
#define S5_WRITEDISABLE_BLUE (1<<28)
#define S5_WRITEDISABLE_MASK (0xf<<28)
#define S5_FORCE_DEFAULT_POINT_SIZE (1<<27)
#define S5_LAST_PIXEL_ENABLE (1<<26)
#define S5_GLOBAL_DEPTH_OFFSET_ENABLE (1<<25)
#define S5_FOG_ENABLE (1<<24)
#define S5_STENCIL_REF_SHIFT 16
#define S5_STENCIL_REF_MASK (0xff<<16)
#define S5_STENCIL_TEST_FUNC_SHIFT 13
#define S5_STENCIL_TEST_FUNC_MASK (0x7<<13)
#define S5_STENCIL_FAIL_SHIFT 10
#define S5_STENCIL_FAIL_MASK (0x7<<10)
#define S5_STENCIL_PASS_Z_FAIL_SHIFT 7
#define S5_STENCIL_PASS_Z_FAIL_MASK (0x7<<7)
#define S5_STENCIL_PASS_Z_PASS_SHIFT 4
#define S5_STENCIL_PASS_Z_PASS_MASK (0x7<<4)
#define S5_STENCIL_WRITE_ENABLE (1<<3)
#define S5_STENCIL_TEST_ENABLE (1<<2)
#define S5_COLOR_DITHER_ENABLE (1<<1)
#define S5_LOGICOP_ENABLE (1<<0)
#define S6_ALPHA_TEST_ENABLE (1<<31)
#define S6_ALPHA_TEST_FUNC_SHIFT 28
#define S6_ALPHA_TEST_FUNC_MASK (0x7<<28)
#define S6_ALPHA_REF_SHIFT 20
#define S6_ALPHA_REF_MASK (0xff<<20)
#define S6_DEPTH_TEST_ENABLE (1<<19)
#define S6_DEPTH_TEST_FUNC_SHIFT 16
#define S6_DEPTH_TEST_FUNC_MASK (0x7<<16)
#define S6_CBUF_BLEND_ENABLE (1<<15)
#define S6_CBUF_BLEND_FUNC_SHIFT 12
#define S6_CBUF_BLEND_FUNC_MASK (0x7<<12)
#define S6_CBUF_SRC_BLEND_FACT_SHIFT 8
#define S6_CBUF_SRC_BLEND_FACT_MASK (0xf<<8)
#define S6_CBUF_DST_BLEND_FACT_SHIFT 4
#define S6_CBUF_DST_BLEND_FACT_MASK (0xf<<4)
#define S6_DEPTH_WRITE_ENABLE (1<<3)
#define S6_COLOR_WRITE_ENABLE (1<<2)
#define S6_TRISTRIP_PV_SHIFT 0
#define S6_TRISTRIP_PV_MASK (0x3<<0)
#define S7_DEPTH_OFFSET_CONST_MASK ~0
/* Primitive dispatch on 830-945 */
#define _3DPRIMITIVE (CMD_3D | (0x1f << 24))
#define PRIM_INDIRECT (1<<23)