winsys/amdgpu: remove force_chaining parameter from cs_check_space

it's always false

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13400>

src/gallium/drivers/r300/r300_blit.c

@@ -384,7 +384,7 @@ static void r300_clear(struct pipe_context* pipe,
             r300_get_num_cs_end_dwords(r300);
 
         /* Reserve CS space. */
-        if (!r300->rws->cs_check_space(&r300->cs, dwords, false)) {
+        if (!r300->rws->cs_check_space(&r300->cs, dwords)) {
             r300_flush(&r300->context, PIPE_FLUSH_ASYNC, NULL);
         }
 

src/gallium/drivers/r300/r300_render.c

@@ -216,7 +216,7 @@ static boolean r300_reserve_cs_dwords(struct r300_context *r300,
     cs_dwords += r300_get_num_cs_end_dwords(r300);
 
     /* Reserve requested CS space. */
-    if (!r300->rws->cs_check_space(&r300->cs, cs_dwords, false)) {
+    if (!r300->rws->cs_check_space(&r300->cs, cs_dwords)) {
         r300_flush(&r300->context, PIPE_FLUSH_ASYNC, NULL);
         flushed = TRUE;
     }

src/gallium/drivers/r600/r600_hw_context.c

@@ -84,7 +84,7 @@ void r600_need_cs_space(struct r600_context *ctx, unsigned num_dw,
 	num_dw += 10;
 
 	/* Flush if there's not enough space. */
-	if (!ctx->b.ws->cs_check_space(&ctx->b.gfx.cs, num_dw, false)) {
+	if (!ctx->b.ws->cs_check_space(&ctx->b.gfx.cs, num_dw)) {
 		ctx->b.gfx.flush(ctx, PIPE_FLUSH_ASYNC, NULL);
 	}
 }

src/gallium/drivers/r600/r600_pipe_common.c

@@ -263,7 +263,7 @@ void r600_need_dma_space(struct r600_common_context *ctx, unsigned num_dw,
 	 * engine busy while uploads are being submitted.
 	 */
 	num_dw++; /* for emit_wait_idle below */
-	if (!ctx->ws->cs_check_space(&ctx->dma.cs, num_dw, false) ||
+	if (!ctx->ws->cs_check_space(&ctx->dma.cs, num_dw) ||
 	    ctx->dma.cs.used_vram_kb + ctx->dma.cs.used_gart_kb > 64 * 1024 ||
 	    !radeon_cs_memory_below_limit(ctx->screen, &ctx->dma.cs, vram, gtt)) {
 		ctx->dma.flush(ctx, PIPE_FLUSH_ASYNC, NULL);

src/gallium/drivers/radeon/radeon_winsys.h

@@ -569,11 +569,9 @@ struct radeon_winsys {
     *
     * \param cs        A command stream.
     * \param dw        Number of CS dwords requested by the caller.
-    * \param force_chaining  Chain the IB into a new buffer now to discard
-    *                        the CP prefetch cache (to emulate PKT3_REWIND)
     * \return true if there is enough space
     */
-   bool (*cs_check_space)(struct radeon_cmdbuf *cs, unsigned dw, bool force_chaining);
+   bool (*cs_check_space)(struct radeon_cmdbuf *cs, unsigned dw);
 
    /**
     * Return the buffer list.

src/gallium/drivers/radeonsi/si_pipe.h

@@ -1923,7 +1923,7 @@ static inline void si_need_gfx_cs_space(struct si_context *ctx, unsigned num_dra
    ctx->memory_usage_kb = 0;
 
    if (radeon_cs_memory_below_limit(ctx->screen, &ctx->gfx_cs, kb) &&
-       ctx->ws->cs_check_space(cs, si_get_minimum_num_gfx_cs_dwords(ctx, num_draws), false))
+       ctx->ws->cs_check_space(cs, si_get_minimum_num_gfx_cs_dwords(ctx, num_draws)))
       return;
 
    si_flush_gfx_cs(ctx, RADEON_FLUSH_ASYNC_START_NEXT_GFX_IB_NOW, NULL);

src/gallium/winsys/amdgpu/drm/amdgpu_cs.c

@@ -1070,8 +1070,7 @@ static bool amdgpu_cs_validate(struct radeon_cmdbuf *rcs)
    return true;
 }
 
-static bool amdgpu_cs_check_space(struct radeon_cmdbuf *rcs, unsigned dw,
-                                  bool force_chaining)
+static bool amdgpu_cs_check_space(struct radeon_cmdbuf *rcs, unsigned dw)
 {
    struct amdgpu_cs *cs = amdgpu_cs(rcs);
    struct amdgpu_ib *ib = &cs->main;
@@ -1085,23 +1084,18 @@ static bool amdgpu_cs_check_space(struct radeon_cmdbuf *rcs, unsigned dw,
    ib->max_check_space_size = MAX2(ib->max_check_space_size,
                                    safe_byte_size);
 
-   /* If force_chaining is true, we can't return. We have to chain. */
-   if (!force_chaining) {
-      unsigned requested_size = rcs->prev_dw + rcs->current.cdw + dw;
+   unsigned requested_size = rcs->prev_dw + rcs->current.cdw + dw;
 
-      if (requested_size > IB_MAX_SUBMIT_DWORDS)
-         return false;
-
-      ib->max_ib_size = MAX2(ib->max_ib_size, requested_size);
-
-      if (rcs->current.max_dw - rcs->current.cdw >= dw)
-         return true;
-   }
-
-   if (!cs->has_chaining) {
-      assert(!force_chaining);
+   if (requested_size > IB_MAX_SUBMIT_DWORDS)
+      return false;
+
+   ib->max_ib_size = MAX2(ib->max_ib_size, requested_size);
+
+   if (rcs->current.max_dw - rcs->current.cdw >= dw)
+      return true;
+
+   if (!cs->has_chaining)
       return false;
-   }
 
    /* Allocate a new chunk */
    if (rcs->num_prev >= rcs->max_prev) {

src/gallium/winsys/radeon/drm/radeon_drm_cs.c

@@ -452,8 +452,7 @@ static bool radeon_drm_cs_validate(struct radeon_cmdbuf *rcs)
    return status;
 }
 
-static bool radeon_drm_cs_check_space(struct radeon_cmdbuf *rcs, unsigned dw,
-                                      bool force_chaining)
+static bool radeon_drm_cs_check_space(struct radeon_cmdbuf *rcs, unsigned dw)
 {
    assert(rcs->current.cdw <= rcs->current.max_dw);
    return rcs->current.max_dw - rcs->current.cdw >= dw;