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ac/nir,radeonsi: replace llvm ngg gs invocation query with nir

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Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20156>
This commit is contained in:
Qiang Yu
2022-11-30 21:43:59 +08:00
committed by Marge Bot
parent fd240f759f
commit 603e68ba36
4 changed files with 2 additions and 34 deletions
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src/amd/common/ac_nir_lower_ngg.c
+2
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@@ -2469,6 +2469,8 @@ ngg_gs_shader_query(nir_builder *b, lower_ngg_gs_state *s)
if (count)
nir_atomic_add_gs_emit_prim_count_amd(b, count);
nir_atomic_add_gs_invocation_count_amd(b, num_active_threads);
}
nir_pop_if(b, if_pipeline_query);
}
src/gallium/drivers/radeonsi/gfx10_shader_ngg.c
-29
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@@ -124,35 +124,6 @@ void gfx10_ngg_export_vertex(struct ac_shader_abi *abi)
si_llvm_build_vs_exports(ctx, outputs, num_outputs);
}
void gfx10_ngg_gs_emit_begin(struct si_shader_context *ctx)
{
LLVMBuilderRef builder = ctx->ac.builder;
LLVMValueRef tmp;
if (ctx->screen->info.gfx_level < GFX11) {
tmp = si_is_gs_thread(ctx);
ac_build_ifcc(&ctx->ac, tmp, 15090);
{
tmp = GET_FIELD(ctx, GS_STATE_PIPELINE_STATS_EMU);
tmp = LLVMBuildTrunc(builder, tmp, ctx->ac.i1, "");
ac_build_ifcc(&ctx->ac, tmp, 5109); /* if (GS_PIPELINE_STATS_EMU) */
LLVMValueRef args[] = {
ctx->ac.i32_1,
ngg_get_emulated_counters_buf(ctx),
LLVMConstInt(ctx->ac.i32,
si_query_pipestat_end_dw_offset(ctx->screen, PIPE_STAT_QUERY_GS_INVOCATIONS) * 4,
false),
ctx->ac.i32_0, /* soffset */
ctx->ac.i32_0, /* cachepolicy */
};
ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.raw.buffer.atomic.add.i32", ctx->ac.i32, args, 5, 0);
ac_build_endif(&ctx->ac, 5109);
}
ac_build_endif(&ctx->ac, 15090);
}
}
static void clamp_gsprims_to_esverts(unsigned *max_gsprims, unsigned max_esverts,
unsigned min_verts_per_prim, bool use_adjacency)
{
src/gallium/drivers/radeonsi/si_shader_internal.h
-1
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@@ -183,7 +183,6 @@ LLVMValueRef gfx10_get_thread_id_in_tg(struct si_shader_context *ctx);
unsigned gfx10_ngg_get_vertices_per_prim(struct si_shader *shader);
bool gfx10_ngg_export_prim_early(struct si_shader *shader);
void gfx10_ngg_export_vertex(struct ac_shader_abi *abi);
void gfx10_ngg_gs_emit_begin(struct si_shader_context *ctx);
unsigned gfx10_ngg_get_scratch_dw_size(struct si_shader *shader);
bool gfx10_ngg_calculate_subgroup_info(struct si_shader *shader);
src/gallium/drivers/radeonsi/si_shader_llvm.c
-4
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@@ -902,10 +902,6 @@ bool si_llvm_translate_nir(struct si_shader_context *ctx, struct si_shader *shad
shader->key.ge.as_ngg && !shader->key.ge.as_es && !shader->key.ge.opt.ngg_culling)
ac_build_s_barrier(&ctx->ac, ctx->stage);
/* NGG GS: handle GS_STATE_PIPELINE_STATS_EMU */
if (ctx->stage == MESA_SHADER_GEOMETRY && shader->key.ge.as_ngg)
gfx10_ngg_gs_emit_begin(ctx);
LLVMValueRef thread_enabled = NULL;
if ((ctx->stage == MESA_SHADER_GEOMETRY && !shader->key.ge.as_ngg) ||