panfrost,tu: use util_is_aligned
I was hoping this would catch more... Oh well.
Via Coccinelle patch:
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expression x, pot;
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-align(x, pot) == x
+util_is_aligned(x, pot)
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expression x, pot;
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-ALIGN(x, pot) == x
+util_is_aligned(x, pot)
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expression x, pot;
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-ALIGN_POT(x, pot) == x
+util_is_aligned(x, pot)
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38169>
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Marge Bot
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commit
603bfa34d9
@@ -274,7 +274,7 @@ tu_tiling_config_update_tile_layout(struct tu_framebuffer *fb,
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/* Check that we did the math right. */
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min_layer_stride = tile_align_h * tile_align_w * pass->min_cpp;
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assert(align(min_layer_stride, gmem_align) == min_layer_stride);
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assert(util_is_aligned(min_layer_stride, gmem_align));
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}
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/* will force to sysmem, don't bother trying to have a valid tile config
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@@ -2447,7 +2447,7 @@ static inline void
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cs_trace_preamble(struct cs_builder *b, const struct cs_tracing_ctx *ctx,
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struct cs_index scratch_regs, unsigned trace_size)
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{
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assert(trace_size > 0 && ALIGN_POT(trace_size, 64) == trace_size &&
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assert(trace_size > 0 && util_is_aligned(trace_size, 64) &&
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trace_size < INT16_MAX);
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assert(scratch_regs.size >= 4 && !(scratch_regs.reg & 1));
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@@ -929,7 +929,7 @@ cs_render_desc_ringbuf_reserve(struct cs_builder *b, uint32_t size)
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assert(size <= RENDER_DESC_RINGBUF_SIZE);
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/* Make sure the allocation is 64-byte aligned. */
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assert(ALIGN_POT(size, 64) == size);
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assert(util_is_aligned(size, 64));
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struct cs_index ringbuf_sync = cs_scratch_reg64(b, 0);
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struct cs_index sz_reg = cs_scratch_reg32(b, 2);
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