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anv,genxml: Handle L3SQCREG1_SQGHPCI in GenXML

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Technically, this is only one field on IVB but it's two on BYT and so it
makes things easier if we split it for all Gen7.

While we're here, make some of the other fields in L3SQCREG1 Booleans.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9537>
This commit is contained in:
Jason Ekstrand
2021-03-11 17:48:03 -06:00
committed by Marge Bot
parent 5abefcb962
commit 5f192b190f
3 changed files with 30 additions and 17 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/intel/genxml/gen7.xml
+11 -4
View File
@@ -3788,10 +3788,17 @@
</register>
<register name="L3SQCREG1" length="1" num="0xb010">
<field name="Convert DC_UC" start="24" end="24" type="uint"/>
<field name="Convert IS_UC" start="25" end="25" type="uint"/>
<field name="Convert C_UC" start="26" end="26" type="uint"/>
<field name="Convert T_UC" start="27" end="27" type="uint"/>
<field name="L3SQ General Priority Credit Initialization" start="20" end="23" type="uint">
<value name="SQGPCI_DEFAULT" value="0x7"/>
<value name="BYT_SQGPCI_DEFAULT" value="0xd"/>
</field>
<field name="L3SQ High Priority Credit Initialization" start="16" end="19" type="uint">
<value name="SQHPCI_DEFAULT" value="0x3"/>
</field>
<field name="Convert DC_UC" start="24" end="24" type="bool"/>
<field name="Convert IS_UC" start="25" end="25" type="bool"/>
<field name="Convert C_UC" start="26" end="26" type="bool"/>
<field name="Convert T_UC" start="27" end="27" type="bool"/>
</register>
<register name="PS_INVOCATION_COUNT" length="2" num="0x2348">
src/intel/genxml/gen75.xml
+10 -4
View File
@@ -4200,10 +4200,16 @@
</register>
<register name="L3SQCREG1" length="1" num="0xb010">
<field name="Convert DC_UC" start="24" end="24" type="uint"/>
<field name="Convert IS_UC" start="25" end="25" type="uint"/>
<field name="Convert C_UC" start="26" end="26" type="uint"/>
<field name="Convert T_UC" start="27" end="27" type="uint"/>
<field name="L3SQ General Priority Credit Initialization" start="19" end="23" type="uint">
<value name="SQGPCI_DEFAULT" value="0xc"/>
</field>
<field name="L3SQ High Priority Credit Initialization" start="14" end="18" type="uint">
<value name="SQHPCI_DEFAULT" value="0x4"/>
</field>
<field name="Convert DC_UC" start="24" end="24" type="bool"/>
<field name="Convert IS_UC" start="25" end="25" type="bool"/>
<field name="Convert C_UC" start="26" end="26" type="bool"/>
<field name="Convert T_UC" start="27" end="27" type="bool"/>
</register>
<register name="PERFCNT1" length="2" num="0x91b8">
src/intel/vulkan/genX_cmd_buffer.c
+9 -9
View File
@@ -1885,10 +1885,6 @@ genX(CmdExecuteCommands)(
genX(cmd_buffer_emit_state_base_address)(primary);
}
#define IVB_L3SQCREG1_SQGHPCI_DEFAULT 0x00730000
#define VLV_L3SQCREG1_SQGHPCI_DEFAULT 0x00d30000
#define HSW_L3SQCREG1_SQGHPCI_DEFAULT 0x00610000
/**
* Program the hardware to use the specified L3 configuration.
*/
@@ -2011,11 +2007,15 @@ genX(cmd_buffer_config_l3)(struct anv_cmd_buffer *cmd_buffer,
.ConvertDC_UC = !has_dc,
.ConvertIS_UC = !has_is,
.ConvertC_UC = !has_c,
.ConvertT_UC = !has_t);
l3sqcr1 |=
GEN_IS_HASWELL ? HSW_L3SQCREG1_SQGHPCI_DEFAULT :
devinfo->is_baytrail ? VLV_L3SQCREG1_SQGHPCI_DEFAULT :
IVB_L3SQCREG1_SQGHPCI_DEFAULT;
.ConvertT_UC = !has_t,
#if GEN_IS_HASWELL
.L3SQGeneralPriorityCreditInitialization = SQGPCI_DEFAULT,
#else
.L3SQGeneralPriorityCreditInitialization =
devinfo->is_baytrail ? BYT_SQGPCI_DEFAULT :
SQGPCI_DEFAULT,
#endif
.L3SQHighPriorityCreditInitialization = SQHPCI_DEFAULT);
anv_pack_struct(&l3cr2, GENX(L3CNTLREG2),
.SLMEnable = has_slm,