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radeon/llvm: Add intrinsic for enabling whole quad mode in SI pixel shaders.

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Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
This commit is contained in:
Michel Dänzer
2012-08-29 18:55:08 +02:00
committed by Michel Dänzer
parent e7383b74ef
commit 5edb80cee0
4 changed files with 23 additions and 0 deletions
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src/gallium/drivers/radeon/SIISelLowering.cpp
+13
View File
@@ -132,6 +132,9 @@ MachineBasicBlock * SITargetLowering::EmitInstrWithCustomInserter(
case AMDGPU::SI_KIL:
LowerSI_KIL(MI, *BB, I, MRI);
break;
case AMDGPU::SI_WQM:
LowerSI_WQM(MI, *BB, I, MRI);
break;
case AMDGPU::SI_V_CNDLT:
LowerSI_V_CNDLT(MI, *BB, I, MRI);
break;
@@ -146,6 +149,16 @@ void SITargetLowering::AppendS_WAITCNT(MachineInstr *MI, MachineBasicBlock &BB,
.addImm(0);
}
void SITargetLowering::LowerSI_WQM(MachineInstr *MI, MachineBasicBlock &BB,
MachineBasicBlock::iterator I, MachineRegisterInfo & MRI) const
{
BuildMI(BB, I, BB.findDebugLoc(I), TII->get(AMDGPU::S_WQM_B64), AMDGPU::EXEC)
.addReg(AMDGPU::EXEC);
MI->eraseFromParent();
}
void SITargetLowering::LowerSI_INTERP(MachineInstr *MI, MachineBasicBlock &BB,
MachineBasicBlock::iterator I, MachineRegisterInfo & MRI) const
{
src/gallium/drivers/radeon/SIISelLowering.h
+2
View File
@@ -37,6 +37,8 @@ class SITargetLowering : public AMDGPUTargetLowering
MachineBasicBlock::iterator I, MachineRegisterInfo &MRI) const;
void LowerSI_KIL(MachineInstr *MI, MachineBasicBlock &BB,
MachineBasicBlock::iterator I, MachineRegisterInfo & MRI) const;
void LowerSI_WQM(MachineInstr *MI, MachineBasicBlock &BB,
MachineBasicBlock::iterator I, MachineRegisterInfo & MRI) const;
void LowerSI_V_CNDLT(MachineInstr *MI, MachineBasicBlock &BB,
MachineBasicBlock::iterator I, MachineRegisterInfo & MRI) const;
src/gallium/drivers/radeon/SIInstructions.td
+7
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@@ -986,6 +986,13 @@ def SI_KIL : InstSI <
[(int_AMDGPU_kill VReg_32:$src)]
>;
def SI_WQM : InstSI <
(outs),
(ins),
"SI_WQM",
[(int_SI_wqm)]
>;
} // end usesCustomInserter
// SI Psuedo branch instructions. These are used by the CFG structurizer pass
src/gallium/drivers/radeon/SIIntrinsics.td
+1
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@@ -20,6 +20,7 @@ let TargetPrefix = "SI", isTarget = 1 in {
def int_SI_load_const : Intrinsic <[llvm_float_ty], [llvm_i64_ty, llvm_i32_ty], []>;
def int_SI_vs_load_buffer_index : Intrinsic <[llvm_i32_ty], [], [IntrNoMem]>;
def int_SI_vs_load_input : Intrinsic <[llvm_v4f32_ty], [llvm_v4i32_ty, llvm_i16_ty, llvm_i32_ty], []> ;
def int_SI_wqm : Intrinsic <[], [], []>;
def int_SI_sample : Intrinsic <[llvm_v4f32_ty], [llvm_i32_ty, llvm_v4f32_ty, llvm_v8i32_ty, llvm_v4i32_ty]>;