gallium/radeon: remove buffer_unmap calls that can potentially decrease perf

buffer_unmap is currently a no-op on radeon and done correctly on amdgpu.
I plan to fix it for radeon, but before that, all occurences of buffer_unmap
that can negatively affect performance in the future must be removed.

There are 2 reasons for removing buffer_unmap calls:
- There is a likelihood that buffer_map will be called again, so we don't
  want to unmap yet.
- The buffer is being released, which automatically unmaps it.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
This commit is contained in:
Marek Olšák
2015-07-16 14:54:50 +02:00
parent 0aa2446e2c
commit 5e3974338e
7 changed files with 1 additions and 26 deletions
-2
View File
@@ -168,8 +168,6 @@ static boolean r300_get_query_result(struct pipe_context* pipe,
map++;
}
r300->rws->buffer_unmap(q->cs_buf);
if (q->type == PIPE_QUERY_OCCLUSION_PREDICATE) {
vresult->b = temp != 0;
} else {
-4
View File
@@ -251,16 +251,12 @@ void r300_texture_transfer_unmap(struct pipe_context *ctx,
struct r300_resource *tex = r300_resource(transfer->resource);
if (trans->linear_texture) {
rws->buffer_unmap(trans->linear_texture->cs_buf);
if (transfer->usage & PIPE_TRANSFER_WRITE) {
r300_copy_into_tiled_texture(ctx, trans);
}
pipe_resource_reference(
(struct pipe_resource**)&trans->linear_texture, NULL);
} else {
rws->buffer_unmap(tex->cs_buf);
}
FREE(transfer);
}
@@ -1409,7 +1409,6 @@ static void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info
data += info.indirect_offset / sizeof(unsigned);
start = data[2] * ib.index_size;
count = data[0];
rctx->b.ws->buffer_unmap(indirect_resource->cs_buf);
}
else {
start = 0;
@@ -939,10 +939,8 @@ void r600_destroy_common_screen(struct r600_common_screen *rscreen)
pipe_mutex_destroy(rscreen->aux_context_lock);
rscreen->aux_context->destroy(rscreen->aux_context);
if (rscreen->trace_bo) {
rscreen->ws->buffer_unmap(rscreen->trace_bo->cs_buf);
if (rscreen->trace_bo)
pipe_resource_reference((struct pipe_resource**)&rscreen->trace_bo, NULL);
}
rscreen->ws->destroy(rscreen->ws);
FREE(rscreen);
-5
View File
@@ -118,7 +118,6 @@ static struct r600_resource *r600_new_query_buffer(struct r600_common_context *c
}
results += 4 * ctx->max_db;
}
ctx->ws->buffer_unmap(buf->cs_buf);
break;
case PIPE_QUERY_TIME_ELAPSED:
case PIPE_QUERY_TIMESTAMP:
@@ -130,7 +129,6 @@ static struct r600_resource *r600_new_query_buffer(struct r600_common_context *c
case PIPE_QUERY_PIPELINE_STATISTICS:
results = r600_buffer_map_sync_with_rings(ctx, buf, PIPE_TRANSFER_WRITE);
memset(results, 0, buf_size);
ctx->ws->buffer_unmap(buf->cs_buf);
break;
default:
assert(0);
@@ -751,7 +749,6 @@ static boolean r600_get_query_buffer_result(struct r600_common_context *ctx,
assert(0);
}
ctx->ws->buffer_unmap(qbuf->buf->cs_buf);
return TRUE;
}
@@ -919,7 +916,6 @@ void r600_query_init_backend_mask(struct r600_common_context *ctx)
results = r600_buffer_map_sync_with_rings(ctx, buffer, PIPE_TRANSFER_WRITE);
if (results) {
memset(results, 0, ctx->max_db * 4 * 4);
ctx->ws->buffer_unmap(buffer->cs_buf);
/* emit EVENT_WRITE for ZPASS_DONE */
radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 2, 0));
@@ -937,7 +933,6 @@ void r600_query_init_backend_mask(struct r600_common_context *ctx)
if (results[i*4 + 1])
mask |= (1<<i);
}
ctx->ws->buffer_unmap(buffer->cs_buf);
}
}
@@ -1059,18 +1059,9 @@ static void r600_texture_transfer_unmap(struct pipe_context *ctx,
struct pipe_transfer* transfer)
{
struct r600_transfer *rtransfer = (struct r600_transfer*)transfer;
struct r600_common_context *rctx = (struct r600_common_context*)ctx;
struct radeon_winsys_cs_handle *buf;
struct pipe_resource *texture = transfer->resource;
struct r600_texture *rtex = (struct r600_texture*)texture;
if (rtransfer->staging) {
buf = rtransfer->staging->cs_buf;
} else {
buf = r600_resource(transfer->resource)->cs_buf;
}
rctx->ws->buffer_unmap(buf);
if ((transfer->usage & PIPE_TRANSFER_WRITE) && rtransfer->staging) {
if (rtex->is_depth && rtex->resource.b.b.nr_samples <= 1) {
ctx->resource_copy_region(ctx, texture, transfer->level,
@@ -309,8 +309,6 @@ static void si_launch_grid(
kernel_args[i]);
}
sctx->b.ws->buffer_unmap(input_buffer->cs_buf);
kernel_args_va = input_buffer->gpu_address;
kernel_args_va += kernel_args_offset;