freedreno/a3xx: fix MAX_INPUTS shader cap

Hardware only supports 16.  Which fd3_shader_variant properly reflected,
but the pipe cap did not, leading to array overflow (and shaders that
could not possibly work).

Also a bunch of asserts to make problems like this easier to see.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
This commit is contained in:
Rob Clark
2014-05-14 11:15:26 -04:00
parent e1896948da
commit 5dcf59e142
3 changed files with 9 additions and 1 deletions
@@ -2138,6 +2138,8 @@ decl_in(struct fd3_compile_context *ctx, struct tgsi_full_declaration *decl)
DBG("decl in -> r%d", i);
compile_assert(ctx, n < ARRAY_SIZE(so->inputs));
so->inputs[n].semantic = decl_semantic(&decl->Semantic);
so->inputs[n].compmask = (1 << ncomp) - 1;
so->inputs[n].regid = r;
@@ -2227,6 +2229,8 @@ decl_out(struct fd3_compile_context *ctx, struct tgsi_full_declaration *decl)
ncomp = 4;
compile_assert(ctx, n < ARRAY_SIZE(so->outputs));
so->outputs[n].semantic = decl_semantic(&decl->Semantic);
so->outputs[n].regid = regid(i, comp);
@@ -2350,6 +2354,7 @@ compile_instructions(struct fd3_compile_context *ctx)
struct tgsi_full_immediate *imm =
&ctx->parser.FullToken.FullImmediate;
unsigned n = ctx->so->immediates_count++;
compile_assert(ctx, n < ARRAY_SIZE(ctx->so->immediates));
memcpy(ctx->so->immediates[n].val, imm->u, 16);
break;
}
@@ -1324,6 +1324,8 @@ decl_in(struct fd3_compile_context *ctx, struct tgsi_full_declaration *decl)
DBG("decl in -> r%d", i + base); // XXX
compile_assert(ctx, n < ARRAY_SIZE(so->inputs));
so->inputs[n].semantic = decl_semantic(&decl->Semantic);
so->inputs[n].compmask = (1 << ncomp) - 1;
so->inputs[n].ncomp = ncomp;
@@ -1410,6 +1412,7 @@ decl_out(struct fd3_compile_context *ctx, struct tgsi_full_declaration *decl)
for (i = decl->Range.First; i <= decl->Range.Last; i++) {
unsigned n = so->outputs_count++;
compile_assert(ctx, n < ARRAY_SIZE(so->outputs));
so->outputs[n].semantic = decl_semantic(&decl->Semantic);
so->outputs[n].regid = regid(i + base, comp);
}
@@ -321,7 +321,7 @@ fd_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
return 8; /* XXX */
case PIPE_SHADER_CAP_MAX_INPUTS:
return 32;
return 16;
case PIPE_SHADER_CAP_MAX_TEMPS:
return 64; /* Max native temporaries. */
case PIPE_SHADER_CAP_MAX_ADDRS: