radeonsi: rename SI_RESOURCE_FLAG_FORCE_TILING to clarify its purpose
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
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@@ -1193,7 +1193,7 @@ resolve_to_temp:
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templ.depth0 = 1;
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templ.array_size = 1;
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templ.usage = PIPE_USAGE_DEFAULT;
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templ.flags = SI_RESOURCE_FLAG_FORCE_TILING |
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templ.flags = SI_RESOURCE_FLAG_FORCE_MSAA_TILING |
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SI_RESOURCE_FLAG_DISABLE_DCC;
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/* The src and dst microtile modes must be the same. */
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@@ -103,7 +103,7 @@
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#define SI_RESOURCE_FLAG_TRANSFER (PIPE_RESOURCE_FLAG_DRV_PRIV << 0)
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#define SI_RESOURCE_FLAG_FLUSHED_DEPTH (PIPE_RESOURCE_FLAG_DRV_PRIV << 1)
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#define SI_RESOURCE_FLAG_FORCE_TILING (PIPE_RESOURCE_FLAG_DRV_PRIV << 2)
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#define SI_RESOURCE_FLAG_FORCE_MSAA_TILING (PIPE_RESOURCE_FLAG_DRV_PRIV << 2)
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#define SI_RESOURCE_FLAG_DISABLE_DCC (PIPE_RESOURCE_FLAG_DRV_PRIV << 3)
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#define SI_RESOURCE_FLAG_UNMAPPABLE (PIPE_RESOURCE_FLAG_DRV_PRIV << 4)
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#define SI_RESOURCE_FLAG_READ_ONLY (PIPE_RESOURCE_FLAG_DRV_PRIV << 5)
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@@ -303,7 +303,7 @@ static int si_init_surface(struct si_screen *sscreen,
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flags |= RADEON_SURF_SHAREABLE;
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if (is_imported)
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flags |= RADEON_SURF_IMPORTED | RADEON_SURF_SHAREABLE;
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if (!(ptex->flags & SI_RESOURCE_FLAG_FORCE_TILING))
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if (!(ptex->flags & SI_RESOURCE_FLAG_FORCE_MSAA_TILING))
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flags |= RADEON_SURF_OPTIMIZE_FOR_SPACE;
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r = sscreen->ws->surface_init(sscreen->ws, ptex, flags, bpe,
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@@ -1293,7 +1293,7 @@ si_choose_tiling(struct si_screen *sscreen,
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const struct pipe_resource *templ, bool tc_compatible_htile)
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{
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const struct util_format_description *desc = util_format_description(templ->format);
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bool force_tiling = templ->flags & SI_RESOURCE_FLAG_FORCE_TILING;
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bool force_tiling = templ->flags & SI_RESOURCE_FLAG_FORCE_MSAA_TILING;
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bool is_depth_stencil = util_format_is_depth_or_stencil(templ->format) &&
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!(templ->flags & SI_RESOURCE_FLAG_FLUSHED_DEPTH);
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