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swr/rast: gen_llvm_types.py support for SIMD256/SIMD512

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Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
This commit is contained in:
Tim Rowley
2017-06-08 14:42:54 -05:00
parent 21baadfe58
commit 5c08bfbd17
1 changed files with 6 additions and 6 deletions
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src/gallium/drivers/swr/rasterizer/codegen/gen_llvm_types.py
+6 -6
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@@ -62,21 +62,21 @@ def gen_llvm_type(type, name, is_pointer, is_pointer_pointer, is_array, is_array
llvm_type = 'VectorType::get(Type::getInt32Ty(ctx), pJitMgr->mVWidth)'
elif type == '__m128i':
llvm_type = 'VectorType::get(Type::getInt32Ty(ctx), 4)'
elif type == 'SIMD8::vector_t':
elif type == 'SIMD256::Float':
llvm_type = 'VectorType::get(Type::getFloatTy(ctx), 8)'
elif type == 'SIMD8::vectori_t':
elif type == 'SIMD256::Integer':
llvm_type = 'VectorType::get(Type::getInt32Ty(ctx), 8)'
elif type == 'SIMD16::vector_t':
elif type == 'SIMD512::Float':
llvm_type = 'VectorType::get(Type::getFloatTy(ctx), 16)'
elif type == 'SIMD16::vectori_t':
elif type == 'SIMD512::Integer':
llvm_type = 'VectorType::get(Type::getInt32Ty(ctx), 16)'
elif type == 'simdvector':
llvm_type = 'ArrayType::get(VectorType::get(Type::getFloatTy(ctx), 8), 4)'
elif type == 'simd16vector':
llvm_type = 'ArrayType::get(VectorType::get(Type::getFloatTy(ctx), 16), 4)'
elif type == 'SIMD8::attrib_t':
elif type == 'SIMD256::Vec4':
llvm_type = 'ArrayType::get(VectorType::get(Type::getFloatTy(ctx), 8), 4)'
elif type == 'SIMD16::attrib_t':
elif type == 'SIMD512::Vec4':
llvm_type = 'ArrayType::get(VectorType::get(Type::getFloatTy(ctx), 16), 4)'
else:
llvm_type = 'Gen_%s(pJitMgr)' % type