freedreno/devices: Establish a7xx sub-generations
We can differentiate three distinctive sub-generations on a7xx. This reduces the number of copy-pasted quirks. Signed-off-by: Valentine Burley <valentine.burley@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31821>
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@@ -341,9 +341,9 @@ a6xx_base = A6XXProps(
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)
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# a6xx can be divided into distinct sub-generations, where certain device-
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# info parameters are keyed to the sub-generation. These templates reduce
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# the copypaste
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# a6xx and a7xx can be divided into distinct sub-generations, where certain
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# device-info parameters are keyed to the sub-generation. These templates
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# reduce the copypaste
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a6xx_gen1_low = A6XXProps(
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reg_size_vec4 = 48,
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@@ -859,30 +859,13 @@ a7xx_base = A6XXProps(
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has_early_preamble = True,
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)
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a7xx_725 = A7XXProps(
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cmdbuf_start_a725_quirk = True,
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a7xx_gen1 = A7XXProps(
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supports_ibo_ubwc = True,
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fs_must_have_non_zero_constlen_quirk = True,
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enable_tp_ubwc_flag_hint = True,
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)
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a7xx_730 = A7XXProps(
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supports_ibo_ubwc = True,
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fs_must_have_non_zero_constlen_quirk = True,
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enable_tp_ubwc_flag_hint = True,
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)
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a7xx_735 = A7XXProps(
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stsc_duplication_quirk = True,
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has_event_write_sample_count = True,
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ubwc_unorm_snorm_int_compatible = True,
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supports_ibo_ubwc = True,
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fs_must_have_non_zero_constlen_quirk = True,
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enable_tp_ubwc_flag_hint = True,
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has_64b_ssbo_atomics = True,
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)
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a7xx_740 = A7XXProps(
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a7xx_gen2 = A7XXProps(
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stsc_duplication_quirk = True,
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has_event_write_sample_count = True,
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ubwc_unorm_snorm_int_compatible = True,
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@@ -894,40 +877,7 @@ a7xx_740 = A7XXProps(
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has_64b_ssbo_atomics = True,
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)
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a7xx_740_a32 = A7XXProps(
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cmdbuf_start_a725_quirk = True,
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stsc_duplication_quirk = True,
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has_event_write_sample_count = True,
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ubwc_unorm_snorm_int_compatible = True,
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supports_ibo_ubwc = True,
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fs_must_have_non_zero_constlen_quirk = True,
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enable_tp_ubwc_flag_hint = False,
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has_64b_ssbo_atomics = True,
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)
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a7xx_740v3 = A7XXProps(
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stsc_duplication_quirk = True,
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has_event_write_sample_count = True,
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ubwc_unorm_snorm_int_compatible = True,
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supports_ibo_ubwc = True,
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fs_must_have_non_zero_constlen_quirk = True,
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enable_tp_ubwc_flag_hint = True,
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has_64b_ssbo_atomics = True,
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)
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a7xx_x1_85 = A7XXProps(
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stsc_duplication_quirk = True,
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has_event_write_sample_count = True,
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ubwc_unorm_snorm_int_compatible = True,
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supports_ibo_ubwc = True,
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fs_must_have_non_zero_constlen_quirk = True,
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# Most devices with a740 have blob v6xx which doesn't have
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# this hint set. Match them for better compatibility by default.
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enable_tp_ubwc_flag_hint = False,
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compute_constlen_quirk = True,
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)
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a7xx_750 = A7XXProps(
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a7xx_gen3 = A7XXProps(
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has_event_write_sample_count = True,
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load_inline_uniforms_via_preamble_ldgk = True,
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load_shader_consts_via_preamble = True,
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@@ -1085,7 +1035,7 @@ add_gpus([
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GPUId(chip_id=0xffff07030002, name="FD725"),
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], A6xxGPUInfo(
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CHIP.A7XX,
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[a7xx_base, a7xx_725],
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[a7xx_base, a7xx_gen1, A7XXProps(cmdbuf_start_a725_quirk = True)],
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num_ccu = 4,
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tile_align_w = 64,
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tile_align_h = 32,
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@@ -1103,7 +1053,7 @@ add_gpus([
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GPUId(chip_id=0xffff07030001, name="FD730"), # Default no-speedbin fallback
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], A6xxGPUInfo(
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CHIP.A7XX,
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[a7xx_base, a7xx_730],
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[a7xx_base, a7xx_gen1],
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num_ccu = 4,
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tile_align_w = 64,
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tile_align_h = 32,
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@@ -1120,7 +1070,7 @@ add_gpus([
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GPUId(chip_id=0x43030B00, name="FD735")
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], A6xxGPUInfo(
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CHIP.A7XX,
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[a7xx_base, a7xx_735],
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[a7xx_base, a7xx_gen2, A7XXProps(enable_tp_ubwc_flag_hint = True)],
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num_ccu = 3,
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tile_align_w = 96,
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tile_align_h = 32,
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@@ -1201,7 +1151,7 @@ add_gpus([
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GPUId(chip_id=0xffff43050a01, name="FD740"), # Default no-speedbin fallback
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], A6xxGPUInfo(
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CHIP.A7XX,
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[a7xx_base, a7xx_740],
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[a7xx_base, a7xx_gen2],
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num_ccu = 6,
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tile_align_w = 96,
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tile_align_h = 32,
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@@ -1218,7 +1168,7 @@ add_gpus([
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GPUId(chip_id=0xffff43050c01, name="Adreno X1-85"),
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], A6xxGPUInfo(
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CHIP.A7XX,
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[a7xx_base, a7xx_x1_85],
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[a7xx_base, a7xx_gen2, A7XXProps(compute_constlen_quirk = True)],
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num_ccu = 6,
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tile_align_w = 96,
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tile_align_h = 32,
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@@ -1237,7 +1187,7 @@ add_gpus([
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GPUId(chip_id=0xffff43050a00, name="FDA32"),
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], A6xxGPUInfo(
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CHIP.A7XX,
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[a7xx_base, a7xx_740_a32],
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[a7xx_base, a7xx_gen2, A7XXProps(cmdbuf_start_a725_quirk = True)],
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num_ccu = 6,
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tile_align_w = 96,
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tile_align_h = 32,
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@@ -1302,7 +1252,7 @@ add_gpus([
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GPUId(chip_id=0xffff43050b00, name="FD740v3"),
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], A6xxGPUInfo(
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CHIP.A7XX,
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[a7xx_base, a7xx_740v3],
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[a7xx_base, a7xx_gen2, A7XXProps(enable_tp_ubwc_flag_hint = True)],
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num_ccu = 6,
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tile_align_w = 96,
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tile_align_h = 32,
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@@ -1337,7 +1287,7 @@ add_gpus([
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GPUId(chip_id=0xffff43051401, name="FD750"), # Default no-speedbin fallback
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], A6xxGPUInfo(
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CHIP.A7XX,
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[a7xx_base, a7xx_750],
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[a7xx_base, a7xx_gen3],
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num_ccu = 6,
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tile_align_w = 96,
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tile_align_h = 32,
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