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r600/sfn: Add test for channel changes in TEX source from opt

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Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19300>
This commit is contained in:
Gert Wollny
2022-10-07 20:09:18 +02:00
committed by Marge Bot
parent 23c7e4d590
commit 5ab6ebefa4
3 changed files with 73 additions and 0 deletions
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src/gallium/drivers/r600/sfn/tests/sfn_optimizer_test.cpp
+8
View File
@@ -268,6 +268,14 @@ TEST_F(TestShaderFromNir, ScheduleVSforTCS)
check(schedule(sh), vtx_for_tcs_sched);
}
TEST_F(TestShaderFromNir, fs_opt_tex_coord)
{
auto sh = from_string(fs_opt_tex_coord_init);
optimize(*sh);
check(sh, fs_opt_tex_coord_expect);
}
void TestShaderFromNir::check(Shader *s, const char *expect_orig)
{
src/gallium/drivers/r600/sfn/tests/sfn_test_shaders.cpp
+62
View File
@@ -2347,6 +2347,68 @@ EXPORT_DONE PIXEL 0 S25.xyzw
)";
const char *fs_opt_tex_coord_init =
R"(FS
CHIPCLASS EVERGREEN
PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
INPUT LOC:0 NAME:5 INTERP:2 SID:9 SPI_SID:10
OUTPUT LOC:0 NAME:1 MASK:15
REGISTERS R0.x@fully R0.y@fully
SHADER
ALU_GROUP_BEGIN
ALU INTERP_XY S1.x@chan : R0.y@fully Param0.x {W} VEC_210
ALU INTERP_XY S1.y@chan : R0.x@fully Param0.y {W} VEC_210
ALU INTERP_XY __.z@chan : R0.y@fully Param0.z {} VEC_210
ALU INTERP_XY __.w@chan : R0.x@fully Param0.w {L} VEC_210
ALU_GROUP_END
ALU_GROUP_BEGIN
ALU INTERP_ZW __.x@chan : R0.y@fully Param0.x {} VEC_210
ALU INTERP_ZW __.y@chan : R0.x@fully Param0.y {} VEC_210
ALU INTERP_ZW S1.z@chan : R0.y@fully Param0.z {W} VEC_210
ALU INTERP_ZW S1.w@chan : R0.x@fully Param0.w {WL} VEC_210
ALU_GROUP_END
ALU MOV S2.x@group : S1.z@chan {W}
ALU MOV S2.y@group : S1.w@chan {WL}
TEX SAMPLE S3.xyzw : S1.xy__ RID:18 SID:0 NNNN
TEX SAMPLE S4.xyzw : S2.xy__ RID:18 SID:0 NNNN
ALU ADD S5.x@group : S3.x@group S4.x@group {W}
ALU ADD S5.y@group : S3.y@group S4.y@group {W}
ALU ADD S5.z@group : S3.z@group S4.z@group {W}
ALU ADD S5.w@group : S3.w@group S4.w@group {W}
EXPORT_DONE PIXEL 0 S5.xyzw)";
const char *fs_opt_tex_coord_expect =
R"(FS
CHIPCLASS EVERGREEN
PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
INPUT LOC:0 NAME:5 INTERP:2 SID:9 SPI_SID:10
OUTPUT LOC:0 NAME:1 MASK:15
REGISTERS R0.x@fully R0.y@fully
SHADER
ALU_GROUP_BEGIN
ALU INTERP_XY S1.x@chan : R0.y@fully Param0.x {W} VEC_210
ALU INTERP_XY S1.y@chan : R0.x@fully Param0.y {W} VEC_210
ALU INTERP_XY __.z@chan : R0.y@fully Param0.z {} VEC_210
ALU INTERP_XY __.w@chan : R0.x@fully Param0.w {L} VEC_210
ALU_GROUP_END
ALU_GROUP_BEGIN
ALU INTERP_ZW __.x@chan : R0.y@fully Param0.x {} VEC_210
ALU INTERP_ZW __.y@chan : R0.x@fully Param0.y {} VEC_210
ALU INTERP_ZW S1.z@chgr : R0.y@fully Param0.z {W} VEC_210
ALU INTERP_ZW S1.w@chgr : R0.x@fully Param0.w {WL} VEC_210
ALU_GROUP_END
TEX SAMPLE S3.xyzw : S1.xy__ RID:18 SID:0 NNNN
TEX SAMPLE S4.xyzw : S1.zw__ RID:18 SID:0 NNNN
ALU ADD S5.x@group : S3.x@group S4.x@group {W}
ALU ADD S5.y@group : S3.y@group S4.y@group {W}
ALU ADD S5.z@group : S3.z@group S4.z@group {W}
ALU ADD S5.w@group : S3.w@group S4.w@group {W}
EXPORT_DONE PIXEL 0 S5.xyzw)";
const char *fs_with_loop_multislot_reuse =
R"(FS
CHIPCLASS CAYMAN
src/gallium/drivers/r600/sfn/tests/sfn_test_shaders.h
+3
View File
@@ -95,6 +95,9 @@ extern const char *vtx_for_tcs_opt;
extern const char *vtx_for_tcs_pre_sched;
extern const char *vtx_for_tcs_sched;
extern const char *fs_opt_tex_coord_init;
extern const char *fs_opt_tex_coord_expect;
class TestShader : public ::testing::Test {
void SetUp() override;