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radv: set FORCE_SIMD_DIST(1) for compute when profitable

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Ported from RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
This commit is contained in:
Samuel Pitoiset
2017-12-14 15:51:20 +01:00
parent 75b1c4997f
commit 5a761167f5
1 changed files with 14 additions and 0 deletions
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src/amd/vulkan/radv_cmd_buffer.c
+14
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@@ -2561,6 +2561,7 @@ radv_emit_compute_pipeline(struct radv_cmd_buffer *cmd_buffer)
{
struct radv_shader_variant *compute_shader;
struct radv_pipeline *pipeline = cmd_buffer->state.compute_pipeline;
struct radv_device *device = cmd_buffer->device;
unsigned compute_resource_limits;
unsigned waves_per_threadgroup;
uint64_t va;
@@ -2602,6 +2603,19 @@ radv_emit_compute_pipeline(struct radv_cmd_buffer *cmd_buffer)
compute_resource_limits =
S_00B854_SIMD_DEST_CNTL(waves_per_threadgroup % 4 == 0);
if (device->physical_device->rad_info.chip_class >= CIK) {
unsigned num_cu_per_se =
device->physical_device->rad_info.num_good_compute_units /
device->physical_device->rad_info.max_se;
/* Force even distribution on all SIMDs in CU if the workgroup
* size is 64. This has shown some good improvements if # of
* CUs per SE is not a multiple of 4.
*/
if (num_cu_per_se % 4 && waves_per_threadgroup == 1)
compute_resource_limits |= S_00B854_FORCE_SIMD_DIST(1);
}
radeon_set_sh_reg(cmd_buffer->cs, R_00B854_COMPUTE_RESOURCE_LIMITS,
compute_resource_limits);