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ir3: Fix non-bindless s2en texture/sampler order

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In gallium samplers and textures have a 1:1 correspondance, so it was
impossible to tell which is which. But we use non-bindless textures for
subpass loads, which don't have a sampler (so common code lowers to an
index of 0) and therefore the order matters. With dynamic rendering, we
can have more than 16 slots for input attachments, so the s2en wasn't
getting optimized away and suddenly it starts mattering, and it turns
out we got it wrong. By fixing this we also make the order the same as
the bindless order, which was always tested well by Vulkan.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31261>
This commit is contained in:
Connor Abbott
2024-05-01 09:47:15 -04:00
committed by Marge Bot
parent 65c0846537
commit 5a4dff5922
2 changed files with 5 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/freedreno/ir3/ir3_compiler_nir.c
+3 -4
View File
@@ -1659,7 +1659,7 @@ get_image_ssbo_samp_tex_src(struct ir3_context *ctx, nir_src *src, bool image)
texture = create_immed_typed(ctx->block, tex_idx, TYPE_U16);
sampler = create_immed_typed(ctx->block, tex_idx, TYPE_U16);
info.samp_tex = ir3_collect(b, sampler, texture);
info.samp_tex = ir3_collect(b, texture, sampler);
}
return info;
@@ -1866,8 +1866,7 @@ get_bindless_samp_src(struct ir3_context *ctx, nir_src *tex,
info.flags |= IR3_INSTR_A1EN;
}
/* Note: the indirect source is now a vec2 instead of hvec2, and
* for some reason the texture and sampler are swapped.
/* Note: the indirect source is now a vec2 instead of hvec2
*/
struct ir3_instruction *texture, *sampler;
@@ -3446,7 +3445,7 @@ get_tex_samp_tex_src(struct ir3_context *ctx, nir_tex_instr *tex)
info.samp_idx = tex->texture_index;
}
info.samp_tex = ir3_collect(b, sampler, texture);
info.samp_tex = ir3_collect(b, texture, sampler);
}
return info;
src/freedreno/ir3/ir3_cp.c
+2 -2
View File
@@ -549,8 +549,8 @@ instr_cp(struct ir3_cp_ctx *ctx, struct ir3_instruction *instr)
assert(samp_tex->opc == OPC_META_COLLECT);
struct ir3_register *samp = samp_tex->srcs[0];
struct ir3_register *tex = samp_tex->srcs[1];
struct ir3_register *tex = samp_tex->srcs[0];
struct ir3_register *samp = samp_tex->srcs[1];
if ((samp->flags & IR3_REG_IMMED) && (tex->flags & IR3_REG_IMMED) &&
(samp->iim_val < 16) && (tex->iim_val < 16)) {