AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

aco: fix read_invocation with VGPR lane index

Browse Source 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 93c8ebfa ('aco: Initial commit of independent AMD compiler')
This commit is contained in:
Rhys Perry
2019-11-12 15:44:17 +00:00
parent c877f4d320
commit 5a1bacb6f9
1 changed files with 1 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/amd/compiler/aco_instruction_selection.cpp
+1 -2
View File
@@ -5626,9 +5626,8 @@ void visit_intrinsic(isel_context *ctx, nir_intrinsic_instr *instr)
}
case nir_intrinsic_read_invocation: {
Temp src = get_ssa_temp(ctx, instr->src[0].ssa);
Temp lane = get_ssa_temp(ctx, instr->src[1].ssa);
Temp lane = bld.as_uniform(get_ssa_temp(ctx, instr->src[1].ssa));
Temp dst = get_ssa_temp(ctx, &instr->dest.ssa);
assert(lane.regClass() == s1);
if (src.regClass() == v1) {
emit_wqm(ctx, bld.vop3(aco_opcode::v_readlane_b32, bld.def(s1), src, lane), dst);
} else if (src.regClass() == v2) {