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nvc0/ir: mark varyings as per-patch based on semantic name

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Also add proper handling for PATCH semantics

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
This commit is contained in:
Ilia Mirkin
2014-07-20 12:17:46 -04:00
parent 4b2a58a523
commit 59438a4d0e
2 changed files with 16 additions and 4 deletions
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src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
+14
View File
@@ -1036,6 +1036,13 @@ bool Source::scanDeclaration(const struct tgsi_full_declaration *decl)
if (decl->Interp.Location || info->io.sampleInterp)
info->in[i].centroid = 1;
}
if (sn == TGSI_SEMANTIC_PATCH ||
sn == TGSI_SEMANTIC_TESSOUTER ||
sn == TGSI_SEMANTIC_TESSINNER)
info->in[i].patch = 1;
if (sn == TGSI_SEMANTIC_PATCH)
info->numPatchConstants = MAX2(info->numPatchConstants, si + 1);
}
}
break;
@@ -1070,6 +1077,13 @@ bool Source::scanDeclaration(const struct tgsi_full_declaration *decl)
case TGSI_SEMANTIC_VIEWPORT_INDEX:
info->io.viewportId = i;
break;
case TGSI_SEMANTIC_PATCH:
info->numPatchConstants = MAX2(info->numPatchConstants, si + 1);
/* fallthrough */
case TGSI_SEMANTIC_TESSOUTER:
case TGSI_SEMANTIC_TESSINNER:
info->out[i].patch = 1;
break;
default:
break;
}
src/gallium/drivers/nouveau/nvc0/nvc0_program.c
+2 -4
View File
@@ -36,6 +36,7 @@ nvc0_shader_input_address(unsigned sn, unsigned si, unsigned ubase)
switch (sn) {
case TGSI_SEMANTIC_TESSOUTER: return 0x000 + si * 0x4;
case TGSI_SEMANTIC_TESSINNER: return 0x010 + si * 0x4;
case TGSI_SEMANTIC_PATCH: return 0x020 + si * 0x10;
case TGSI_SEMANTIC_PRIMID: return 0x060;
case TGSI_SEMANTIC_LAYER: return 0x064;
case TGSI_SEMANTIC_VIEWPORT_INDEX:return 0x068;
@@ -66,6 +67,7 @@ nvc0_shader_output_address(unsigned sn, unsigned si, unsigned ubase)
switch (sn) {
case TGSI_SEMANTIC_TESSOUTER: return 0x000 + si * 0x4;
case TGSI_SEMANTIC_TESSINNER: return 0x010 + si * 0x4;
case TGSI_SEMANTIC_PATCH: return 0x020 + si * 0x10;
case TGSI_SEMANTIC_PRIMID: return 0x060;
case TGSI_SEMANTIC_LAYER: return 0x064;
case TGSI_SEMANTIC_VIEWPORT_INDEX:return 0x068;
@@ -120,8 +122,6 @@ nvc0_sp_assign_input_slots(struct nv50_ir_prog_info *info)
for (i = 0; i < info->numInputs; ++i) {
offset = nvc0_shader_input_address(info->in[i].sn,
info->in[i].si, ubase);
if (info->in[i].patch && offset >= 0x20)
offset = 0x20 + info->in[i].si * 0x10;
for (c = 0; c < 4; ++c)
info->in[i].slot[c] = (offset + c * 0x4) / 4;
@@ -163,8 +163,6 @@ nvc0_sp_assign_output_slots(struct nv50_ir_prog_info *info)
for (i = 0; i < info->numOutputs; ++i) {
offset = nvc0_shader_output_address(info->out[i].sn,
info->out[i].si, ubase);
if (info->out[i].patch && offset >= 0x20)
offset = 0x20 + info->out[i].si * 0x10;
for (c = 0; c < 4; ++c)
info->out[i].slot[c] = (offset + c * 0x4) / 4;