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ir3: add encoding support for 64-bit atomics introduced in a7xx.

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Signed-off-by: Amber Harmonia <amber@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27776>
This commit is contained in:
Amber
2024-02-14 12:10:18 +01:00
committed by Marge Bot
parent 84d57e1fb1
commit 5628a01523
6 changed files with 42 additions and 13 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/freedreno/ir3/instr-a3xx.h
+1
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@@ -410,6 +410,7 @@ typedef enum {
TYPE_U32 = 3,
TYPE_S16 = 4,
TYPE_S32 = 5,
TYPE_ATOMIC_U64 = 6, /* Only valid for a7xx atomics */
TYPE_U8 = 6,
TYPE_U8_32 = 7,
} type_t;
src/freedreno/ir3/ir3_lexer.l
+2 -2
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@@ -180,8 +180,7 @@ static int parse_reg(const char *str)
"gat" return TOKEN(T_OP_GAT);
"sct" return TOKEN(T_OP_SCT);
("f16"|"f32"|"u16"|"u32"|"s16"|"s32"|"u8"|"u8_32"){2} ir3_yylval.str = yytext; return T_CAT1_TYPE_TYPE;
("f16"|"f32"|"u16"|"u32"|"s16"|"s32"|"u8"|"u8_32"|"u64"){2} ir3_yylval.str = yytext; return T_CAT1_TYPE_TYPE;
/* category 2: */
"add.f" return TOKEN(T_OP_ADD_F);
"min.f" return TOKEN(T_OP_MIN_F);
@@ -409,6 +408,7 @@ static int parse_reg(const char *str)
"s32" return TOKEN(T_TYPE_S32);
"u8" return TOKEN(T_TYPE_U8);
"u8_32" return TOKEN(T_TYPE_U8_32);
"u64" return TOKEN(T_TYPE_U64);
"untyped" return TOKEN(T_UNTYPED);
"typed" return TOKEN(T_TYPED);
src/freedreno/ir3/ir3_parser.y
+5
View File
@@ -148,6 +148,9 @@ static type_t parse_type(const char **type)
} else if (!strncmp("u8_32", *type, 5)) {
*type += 5;
return TYPE_U8_32;
} else if (!strncmp("u64", *type, 3)) {
*type += 3;
return TYPE_ATOMIC_U64;
} else {
assert(0); /* shouldn't get here */
return ~0;
@@ -673,6 +676,7 @@ static void print_token(FILE *file, int type, YYSTYPE value)
%token <tok> T_TYPE_S32
%token <tok> T_TYPE_U8
%token <tok> T_TYPE_U8_32
%token <tok> T_TYPE_U64
%token <tok> T_UNTYPED
%token <tok> T_TYPED
@@ -1615,3 +1619,4 @@ type: T_TYPE_F16 { $$ = TYPE_F16; }
| T_TYPE_S32 { $$ = TYPE_S32; }
| T_TYPE_U8 { $$ = TYPE_U8; }
| T_TYPE_U8_32 { $$ = TYPE_U8_32; }
| T_TYPE_U64 { $$ = TYPE_ATOMIC_U64; }
src/freedreno/ir3/tests/disasm.c
+2
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@@ -468,6 +468,8 @@ static const struct test {
INSTR_6XX(c6e62005_3f800008, "shfl.xor.u32 r1.y, r1.x, 63"),
/* dEQP-VK.subgroups.shuffle.graphics.subgroupshuffle_bvec4 */
INSTR_6XX(c6e4c012_c0000020, "shfl.rup.u16 hr4.z, hr4.x, r48.x"),
/* dEQP-VK.glsl.atomic_operations.exchange_unsigned64bit_compute */
INSTR_7XX(c03c0009_05648142, "atomic.b.xchg.untyped.1d.u64.1.uniform.base1 r2.y, r1.y, r0.x"),
/* Custom test since we've never seen the blob emit these. */
INSTR_6XX(c0260004_00490000, "getspid.u32 r1.x"),
src/freedreno/isa/ir3-cat6.xml
+21 -11
View File
@@ -679,7 +679,7 @@ SOFTWARE.
<pattern low="54" high="58">11101</pattern> <!-- OPC -->
</bitset>
<bitset name="#instruction-cat6-a3xx-atomic" extends="#instruction-cat6-a3xx">
<bitset name="#instruction-cat6-a3xx-atomic" extends="#instruction-cat6">
<doc>
Base for atomic instructions (I think mostly a4xx+, as
a3xx didn't have real image/ssbo.. it was all just global).
@@ -724,6 +724,7 @@ SOFTWARE.
<pattern pos="0" >1</pattern>
<pattern low="1" high="8" >00000000</pattern> <!-- SRC3 -->
<pattern low="41" high="48" >00000000</pattern> <!-- SSBO/image binding point -->
<field low="49" high="51" name="TYPE" type="#type"/>
<pattern pos="52" >0</pattern> <!-- "G" -->
<pattern pos="53" >0</pattern> <!-- SSBO_IM -->
</bitset>
@@ -795,6 +796,7 @@ SOFTWARE.
<field low="41" high="48" name="SSBO" type="#cat6-src"> <!-- SSBO/image binding point -->
<param name="SSBO_IM" as="SRC_IM"/>
</field>
<field low="49" high="51" name="TYPE" type="#type-atomic"/>
<pattern pos="52" >1</pattern> <!-- "G" -->
<field pos="53" name="SSBO_IM" type="bool"/>
@@ -938,6 +940,7 @@ SOFTWARE.
<pattern pos="0" >1</pattern>
<pattern low="1" high="8" >00000000</pattern> <!-- SRC3 -->
<pattern low="41" high="48" >00000000</pattern> <!-- SSBO/image binding point -->
<field low="49" high="51" name="TYPE" type="#type-atomic"/>
<pattern pos="52" >1</pattern> <!-- "G" -->
<pattern pos="53" >0</pattern> <!-- SSBO_IM -->
</bitset>
@@ -1206,7 +1209,6 @@ SOFTWARE.
<param name="SSBO_IM" as="SRC_IM"/>
</field>
<derived name="SSBO_IM" expr="#cat6-direct" type="bool"/>
<field low="49" high="51" name="TYPE" type="#type"/>
<encode>
<map name="TYPED">src</map>
<map name="D_MINUS_ONE">src->cat6.d - 1</map>
@@ -1225,6 +1227,7 @@ SOFTWARE.
<bitset name="#instruction-cat6-a6xx-ibo-load-store" extends="#instruction-cat6-a6xx-ibo-base">
<field pos="23" name="HAS_OFFSET" type="bool"/>
<field low="4" high="5" name="OFFSET_HI" type="uint"/>
<field low="49" high="51" name="TYPE" type="#type"/>
<field low="54" high="58" name="OFFSET_LO" type="uint"/>
<derived name="OFFSET" type="uoffset">
@@ -1245,6 +1248,13 @@ SOFTWARE.
</encode>
</bitset>
<bitset name="#instruction-cat6-a6xx-ibo-atomic" extends="#instruction-cat6-a6xx-ibo">
<field low="49" high="51" name="TYPE" type="#type-atomic"/>
<display>
{SY}{JP}{NAME}.{TYPED}.{D}d.{TYPE}.{TYPE_SIZE}.{MODE}{BASE} {SRC1}, {SRC2}, {SSBO}
</display>
</bitset>
<bitset name="stib.b" extends="#instruction-cat6-a6xx-ibo-load-store">
<doc>
STore IBo
@@ -1266,19 +1276,19 @@ SOFTWARE.
</encode>
</bitset>
<bitset name="atomic.b.add" extends="#instruction-cat6-a6xx-ibo">
<bitset name="atomic.b.add" extends="#instruction-cat6-a6xx-ibo-atomic">
<pattern pos="0" >x</pattern>
<pattern low="14" high="19">010000</pattern> <!-- OPC -->
<pattern low="52" high="53">11</pattern>
</bitset>
<bitset name="atomic.b.sub" extends="#instruction-cat6-a6xx-ibo">
<bitset name="atomic.b.sub" extends="#instruction-cat6-a6xx-ibo-atomic">
<pattern pos="0" >x</pattern>
<pattern low="14" high="19">010001</pattern> <!-- OPC -->
<pattern low="52" high="53">11</pattern>
</bitset>
<bitset name="atomic.b.xchg" extends="#instruction-cat6-a6xx-ibo">
<bitset name="atomic.b.xchg" extends="#instruction-cat6-a6xx-ibo-atomic">
<pattern pos="0" >x</pattern>
<pattern low="14" high="19">010010</pattern> <!-- OPC -->
<pattern low="52" high="53">11</pattern>
@@ -1286,37 +1296,37 @@ SOFTWARE.
<!-- inc/dec? -->
<bitset name="atomic.b.cmpxchg" extends="#instruction-cat6-a6xx-ibo">
<bitset name="atomic.b.cmpxchg" extends="#instruction-cat6-a6xx-ibo-atomic">
<pattern pos="0" >x</pattern>
<pattern low="14" high="19">010101</pattern> <!-- OPC -->
<pattern low="52" high="53">11</pattern>
</bitset>
<bitset name="atomic.b.min" extends="#instruction-cat6-a6xx-ibo">
<bitset name="atomic.b.min" extends="#instruction-cat6-a6xx-ibo-atomic">
<pattern pos="0" >x</pattern>
<pattern low="14" high="19">010110</pattern> <!-- OPC -->
<pattern low="52" high="53">11</pattern>
</bitset>
<bitset name="atomic.b.max" extends="#instruction-cat6-a6xx-ibo">
<bitset name="atomic.b.max" extends="#instruction-cat6-a6xx-ibo-atomic">
<pattern pos="0" >x</pattern>
<pattern low="14" high="19">010111</pattern> <!-- OPC -->
<pattern low="52" high="53">11</pattern>
</bitset>
<bitset name="atomic.b.and" extends="#instruction-cat6-a6xx-ibo">
<bitset name="atomic.b.and" extends="#instruction-cat6-a6xx-ibo-atomic">
<pattern pos="0" >x</pattern>
<pattern low="14" high="19">011000</pattern> <!-- OPC -->
<pattern low="52" high="53">11</pattern>
</bitset>
<bitset name="atomic.b.or" extends="#instruction-cat6-a6xx-ibo">
<bitset name="atomic.b.or" extends="#instruction-cat6-a6xx-ibo-atomic">
<pattern pos="0" >x</pattern>
<pattern low="14" high="19">011001</pattern> <!-- OPC -->
<pattern low="52" high="53">11</pattern>
</bitset>
<bitset name="atomic.b.xor" extends="#instruction-cat6-a6xx-ibo">
<bitset name="atomic.b.xor" extends="#instruction-cat6-a6xx-ibo-atomic">
<pattern pos="0" >x</pattern>
<pattern low="14" high="19">011010</pattern> <!-- OPC -->
<pattern low="52" high="53">11</pattern>
src/freedreno/isa/ir3-common.xml
+11
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@@ -320,6 +320,17 @@ SOFTWARE.
({TYPE} == 6) /* u8 */
</expr>
<enum name="#type-atomic">
<value val="0" display="f16"/>
<value val="1" display="f32"/>
<value val="2" display="u16"/>
<value val="3" display="u32"/>
<value val="4" display="s16"/>
<value val="5" display="s32"/>
<value val="6" display="u64"/>
<value val="7" display="u8_32"/>
</enum>
<enum name="#absneg">
<value val="0" display=""/>
<value val="1" display="(neg)"/>