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i965/vs: Use a send from a 2-register VGRF for shader time writes.

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This will let us emit it later, after we're setting up MRFs for the
URB write.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Eric Anholt
2012-12-17 17:11:21 -08:00
parent 130138030a
commit 55feb19704
2 changed files with 13 additions and 14 deletions
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src/mesa/drivers/dri/i965/brw_vec4.cpp
+12 -12
View File
@@ -222,7 +222,7 @@ vec4_instruction::is_math()
bool
vec4_instruction::is_send_from_grf()
{
return false;
return opcode == SHADER_OPCODE_SHADER_TIME_ADD;
}
bool
@@ -1264,20 +1264,20 @@ vec4_visitor::emit_shader_time_write(enum shader_time_shader_type type,
int shader_time_index = brw_get_shader_time_index(brw, prog, &vp->Base,
type);
int base_mrf = 6;
dst_reg dst =
dst_reg(this, glsl_type::get_array_instance(glsl_type::vec4_type, 2));
dst_reg offset_mrf = dst_reg(MRF, base_mrf);
offset_mrf.type = BRW_REGISTER_TYPE_UD;
emit(MOV(offset_mrf, src_reg(shader_time_index * SHADER_TIME_STRIDE)));
dst_reg offset = dst;
dst_reg time = dst;
time.reg_offset++;
dst_reg time_mrf = dst_reg(MRF, base_mrf + 1);
time_mrf.type = BRW_REGISTER_TYPE_UD;
emit(MOV(time_mrf, src_reg(value)));
offset.type = BRW_REGISTER_TYPE_UD;
emit(MOV(offset, src_reg(shader_time_index * SHADER_TIME_STRIDE)));
vec4_instruction *inst;
inst = emit(SHADER_OPCODE_SHADER_TIME_ADD);
inst->base_mrf = base_mrf;
inst->mlen = 2;
time.type = BRW_REGISTER_TYPE_UD;
emit(MOV(time, src_reg(value)));
emit(SHADER_OPCODE_SHADER_TIME_ADD, dst_reg(), src_reg(dst));
}
bool
src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
+1 -2
View File
@@ -674,8 +674,7 @@ vec4_generator::generate_vs_instruction(vec4_instruction *instruction,
break;
case SHADER_OPCODE_SHADER_TIME_ADD:
brw_shader_time_add(p, brw_message_reg(inst->base_mrf),
SURF_INDEX_VS_SHADER_TIME);
brw_shader_time_add(p, src[0], SURF_INDEX_VS_SHADER_TIME);
break;
default: