etnaviv: rs: Move RS_SINGLE_BUFFER control to per-operation basis
Move RS_SINGLE_BUFFER from global context initialization to individual RS operations, enabling it before each operation and disabling it immediately after. The same pattern is seen in traces from the binary blob driver. Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com> Acked-by: Lucas Stach <l.stach@pengutronix.de> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36565>
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55447790c4
@@ -545,11 +545,6 @@ etna_reset_gpu_state(struct etna_context *ctx)
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if (VIV_FEATURE(screen, ETNA_FEATURE_BUG_FIXES18))
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etna_set_state(stream, VIVS_GL_BUG_FIXES, 0x6);
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if (!screen->specs.use_blt) {
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/* Enable SINGLE_BUFFER for resolve, if supported */
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etna_set_state(stream, VIVS_RS_SINGLE_BUFFER, COND(screen->specs.single_buffer, VIVS_RS_SINGLE_BUFFER_ENABLE));
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}
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if (screen->info->halti >= 5 && !DBG_ENABLED(ETNA_DBG_NO_TEXDESC)) {
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/* TXDESC cache flush - do this once at the beginning, as texture
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* descriptors are only written by the CPU once, then patched by the kernel
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@@ -180,6 +180,10 @@ etna_compile_rs_state(struct etna_context *ctx, struct compiled_rs_state *cs,
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cs->RS_KICKER_INPLACE = rs->tile_count;
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}
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cs->source_ts_valid = rs->source_ts_valid;
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cs->single_buffer = screen->specs.single_buffer;
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if (cs->single_buffer)
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assert(!src_multi && !dst_multi);
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}
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#define EMIT_STATE(state_name, src_value) \
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@@ -244,7 +248,12 @@ etna_submit_rs_state(struct etna_context *ctx,
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/*28 */ EMIT_STATE(RS_FILL_VALUE(2), cs->RS_FILL_VALUE[2]);
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/*29 */ EMIT_STATE(RS_FILL_VALUE(3), cs->RS_FILL_VALUE[3]);
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/*30/31*/ EMIT_STATE(RS_EXTRA_CONFIG, cs->RS_EXTRA_CONFIG);
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if (cs->single_buffer)
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EMIT_STATE(RS_SINGLE_BUFFER, VIVS_RS_SINGLE_BUFFER_ENABLE);
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/*32/33*/ EMIT_STATE(RS_KICKER, 0xbeebbeeb);
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if (cs->single_buffer)
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EMIT_STATE(RS_SINGLE_BUFFER, 0x0);
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etna_coalesce_end(stream, &coalesce);
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} else {
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etna_cmd_stream_reserve(stream, 22);
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@@ -66,6 +66,7 @@ struct rs_state {
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/* treat this as opaque structure */
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struct compiled_rs_state {
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uint8_t source_ts_valid : 1;
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uint8_t single_buffer : 1;
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uint32_t RS_CONFIG;
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uint32_t RS_SOURCE_STRIDE;
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uint32_t RS_DEST_STRIDE;
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