etnaviv: rs: Move RS_SINGLE_BUFFER control to per-operation basis

Move RS_SINGLE_BUFFER from global context initialization to individual
RS operations, enabling it before each operation and disabling it
immediately after. The same pattern is seen in traces from the binary
blob driver.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Acked-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36565>
This commit is contained in:
Christian Gmeiner
2025-08-21 00:47:07 +02:00
committed by Marge Bot
parent d7fff632cd
commit 55447790c4
3 changed files with 10 additions and 5 deletions

View File

@@ -545,11 +545,6 @@ etna_reset_gpu_state(struct etna_context *ctx)
if (VIV_FEATURE(screen, ETNA_FEATURE_BUG_FIXES18))
etna_set_state(stream, VIVS_GL_BUG_FIXES, 0x6);
if (!screen->specs.use_blt) {
/* Enable SINGLE_BUFFER for resolve, if supported */
etna_set_state(stream, VIVS_RS_SINGLE_BUFFER, COND(screen->specs.single_buffer, VIVS_RS_SINGLE_BUFFER_ENABLE));
}
if (screen->info->halti >= 5 && !DBG_ENABLED(ETNA_DBG_NO_TEXDESC)) {
/* TXDESC cache flush - do this once at the beginning, as texture
* descriptors are only written by the CPU once, then patched by the kernel

View File

@@ -180,6 +180,10 @@ etna_compile_rs_state(struct etna_context *ctx, struct compiled_rs_state *cs,
cs->RS_KICKER_INPLACE = rs->tile_count;
}
cs->source_ts_valid = rs->source_ts_valid;
cs->single_buffer = screen->specs.single_buffer;
if (cs->single_buffer)
assert(!src_multi && !dst_multi);
}
#define EMIT_STATE(state_name, src_value) \
@@ -244,7 +248,12 @@ etna_submit_rs_state(struct etna_context *ctx,
/*28 */ EMIT_STATE(RS_FILL_VALUE(2), cs->RS_FILL_VALUE[2]);
/*29 */ EMIT_STATE(RS_FILL_VALUE(3), cs->RS_FILL_VALUE[3]);
/*30/31*/ EMIT_STATE(RS_EXTRA_CONFIG, cs->RS_EXTRA_CONFIG);
if (cs->single_buffer)
EMIT_STATE(RS_SINGLE_BUFFER, VIVS_RS_SINGLE_BUFFER_ENABLE);
/*32/33*/ EMIT_STATE(RS_KICKER, 0xbeebbeeb);
if (cs->single_buffer)
EMIT_STATE(RS_SINGLE_BUFFER, 0x0);
etna_coalesce_end(stream, &coalesce);
} else {
etna_cmd_stream_reserve(stream, 22);

View File

@@ -66,6 +66,7 @@ struct rs_state {
/* treat this as opaque structure */
struct compiled_rs_state {
uint8_t source_ts_valid : 1;
uint8_t single_buffer : 1;
uint32_t RS_CONFIG;
uint32_t RS_SOURCE_STRIDE;
uint32_t RS_DEST_STRIDE;