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intel/fs: Emit QUAD_SWIZZLE instructions with WE_all for derivative lowering.

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Otherwise the code generator will attempt to emit SIMD-lowered
QUAD_SWIZZLE instructions with an execution group not multiple of 8,
which is invalid on Xe2+.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27165>
This commit is contained in:
Francisco Jerez
2022-07-08 14:57:01 -07:00
committed by Marge Bot
parent 3e710a84ad
commit 54f3d5a00c
1 changed files with 5 additions and 5 deletions
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src/intel/compiler/brw_fs.cpp
+5 -5
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@@ -5670,12 +5670,12 @@ static bool
lower_derivative(fs_visitor *v, bblock_t *block, fs_inst *inst,
unsigned swz0, unsigned swz1)
{
const fs_builder ibld(v, block, inst);
const fs_reg tmp0 = ibld.vgrf(inst->src[0].type);
const fs_reg tmp1 = ibld.vgrf(inst->src[0].type);
const fs_builder ubld = fs_builder(v, block, inst).exec_all();
const fs_reg tmp0 = ubld.vgrf(inst->src[0].type);
const fs_reg tmp1 = ubld.vgrf(inst->src[0].type);
ibld.emit(SHADER_OPCODE_QUAD_SWIZZLE, tmp0, inst->src[0], brw_imm_ud(swz0));
ibld.emit(SHADER_OPCODE_QUAD_SWIZZLE, tmp1, inst->src[0], brw_imm_ud(swz1));
ubld.emit(SHADER_OPCODE_QUAD_SWIZZLE, tmp0, inst->src[0], brw_imm_ud(swz0));
ubld.emit(SHADER_OPCODE_QUAD_SWIZZLE, tmp1, inst->src[0], brw_imm_ud(swz1));
inst->resize_sources(2);
inst->src[0] = negate(tmp0);